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Added comment to clarify GP_ABUF cell

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Andrew Zonenberg 2016-05-02 20:29:39 -07:00
parent 79460208c9
commit 9fc9d5f1fb
1 changed files with 2 additions and 0 deletions
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techlibs/greenpak4/cells_sim.v
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@ -17,6 +17,8 @@ module GP_ABUF(input wire IN, output wire OUT);
assign OUT = IN;
//cannot simulate mixed signal IP
endmodule
module GP_ACMP(input wire PWREN, input wire VIN, input wire VREF, output reg OUT);