mirror of
https://github.com/YosysHQ/yosys
synced 2025-10-08 08:51:56 +00:00
presentation progress
This commit is contained in:
parent
aa8e754ae5
commit
9f6364c1c4
5 changed files with 230 additions and 8 deletions
|
@ -7,6 +7,14 @@
|
|||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Why writing Yosys extensions?}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Program Components and Data Formats}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
|
@ -66,7 +74,7 @@ writing Yosys extensions it is key to understand this format.
|
|||
\end{center}
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{RTLIL without memories and processes}
|
||||
|
||||
|
@ -96,3 +104,101 @@ if (module->processes.size() != 0 || module->memories.size() != 0)
|
|||
For simplicity we only discuss this version of RTLIL in this presentation.
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Using dump and show commands}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{The RTLIL::Const Structure}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{The RTLIL::SigSpec Structure}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{RTLIL::Design, RTLIL::Module}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{RTLIL::Wire and connections}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{RTLIL::Cell}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Creating modules from scratch}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Modifying modules}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Using the SigMap helper class}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Printing log messages}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Creating a command}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
\subsection{Creating a plugin}
|
||||
|
||||
\begin{frame}{\subsecname}
|
||||
TBD
|
||||
\end{frame}
|
||||
|
||||
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue