From a63e2508fcca395e795029d5c57c59acc63a9959 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 7 Jan 2020 12:52:03 -0800 Subject: [PATCH 01/22] Add RTLIL::constpad, init by yosys_setup(); use for abc9 --- kernel/rtlil.cc | 1 + kernel/rtlil.h | 2 ++ kernel/yosys.cc | 9 +++++++++ passes/cmds/scratchpad.cc | 25 ++++++++++++++++++------- passes/techmap/abc9.cc | 34 +++++++++------------------------- 5 files changed, 39 insertions(+), 32 deletions(-) diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index ab4f4f377..f286d139f 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -46,6 +46,7 @@ IdString RTLIL::ID::Y; IdString RTLIL::ID::keep; IdString RTLIL::ID::whitebox; IdString RTLIL::ID::blackbox; +dict RTLIL::constpad; RTLIL::Const::Const() { diff --git a/kernel/rtlil.h b/kernel/rtlil.h index e5b24cc02..6251d265d 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -377,6 +377,8 @@ namespace RTLIL extern IdString blackbox; }; + extern dict constpad; + static inline std::string escape_id(std::string str) { if (str.size() > 0 && str[0] != '\\' && str[0] != '$') return "\\" + str; diff --git a/kernel/yosys.cc b/kernel/yosys.cc index 5018a4888..6c8427c19 100644 --- a/kernel/yosys.cc +++ b/kernel/yosys.cc @@ -524,6 +524,15 @@ void yosys_setup() PyRun_SimpleString("import sys"); #endif + RTLIL::constpad["abc9.script.default"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} -v; &mfs"; + RTLIL::constpad["abc9.script.default.area"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} -a -v; &mfs"; + RTLIL::constpad["abc9.script.default.fast"] = "&if {W} {D}"; + RTLIL::constpad["abc9.script.flow3"] = "&scorr; &sweep;" \ + "&if {C} {W} {D}; &save; &st; &syn2; &if {C} {W} {D} -v; &save; &load; "\ + "&st; &if {C} -g -K 6; &dch -f; &if {C} {W} {D} -v; &save; &load; "\ + "&st; &if {C} -g -K 6; &synch2; &if {C} {W} {D} -v; &save; &load; "\ + "&mfs"; + Pass::init_register(); yosys_design = new RTLIL::Design; yosys_celltypes.setup(); diff --git a/passes/cmds/scratchpad.cc b/passes/cmds/scratchpad.cc index 7ec55b78e..34ec0863a 100644 --- a/passes/cmds/scratchpad.cc +++ b/passes/cmds/scratchpad.cc @@ -70,8 +70,10 @@ struct ScratchpadPass : public Pass { { if (args[argidx] == "-get" && argidx+1 < args.size()) { string identifier = args[++argidx]; - if (design->scratchpad.count(identifier)){ + if (design->scratchpad.count(identifier)) { log("%s\n", design->scratchpad_get_string(identifier).c_str()); + } else if (RTLIL::constpad.count(identifier)) { + log("%s\n", RTLIL::constpad.at(identifier).c_str()); } else { log("\"%s\" not set\n", identifier.c_str()); } @@ -79,6 +81,8 @@ struct ScratchpadPass : public Pass { } if (args[argidx] == "-set" && argidx+2 < args.size()) { string identifier = args[++argidx]; + if (RTLIL::constpad.count(identifier)) + log_error("scratchpad entry \"%s\" is a global constant\n", identifier.c_str()); string value = args[++argidx]; if (value.front() == '\"' && value.back() == '\"') value = value.substr(1, value.size() - 2); design->scratchpad_set_string(identifier, value); @@ -92,8 +96,15 @@ struct ScratchpadPass : public Pass { if (args[argidx] == "-copy" && argidx+2 < args.size()) { string identifier_from = args[++argidx]; string identifier_to = args[++argidx]; - if (design->scratchpad.count(identifier_from) == 0) log_error("\"%s\" not set\n", identifier_from.c_str()); - string value = design->scratchpad_get_string(identifier_from); + string value; + if (design->scratchpad.count(identifier_from)) + value = design->scratchpad_get_string(identifier_from); + else if (RTLIL::constpad.count(identifier_from)) + value = RTLIL::constpad.at(identifier_from); + else + log_error("\"%s\" not set\n", identifier_from.c_str()); + if (RTLIL::constpad.count(identifier_to)) + log_error("scratchpad entry \"%s\" is a global constant\n", identifier_to.c_str()); design->scratchpad_set_string(identifier_to, value); continue; } @@ -102,10 +113,10 @@ struct ScratchpadPass : public Pass { string expected = args[++argidx]; if (expected.front() == '\"' && expected.back() == '\"') expected = expected.substr(1, expected.size() - 2); if (design->scratchpad.count(identifier) == 0) - log_error("Assertion failed: scratchpad entry '%s' is not defined\n", identifier.c_str()); + log_error("scratchpad entry '%s' is not defined\n", identifier.c_str()); string value = design->scratchpad_get_string(identifier); if (value != expected) { - log_error("Assertion failed: scratchpad entry '%s' is set to '%s' instead of the asserted '%s'\n", + log_error("scratchpad entry '%s' is set to '%s' instead of the asserted '%s'\n", identifier.c_str(), value.c_str(), expected.c_str()); } continue; @@ -113,13 +124,13 @@ struct ScratchpadPass : public Pass { if (args[argidx] == "-assert-set" && argidx+1 < args.size()) { string identifier = args[++argidx]; if (design->scratchpad.count(identifier) == 0) - log_error("Assertion failed: scratchpad entry '%s' is not defined\n", identifier.c_str()); + log_error("scratchpad entry '%s' is not defined\n", identifier.c_str()); continue; } if (args[argidx] == "-assert-unset" && argidx+1 < args.size()) { string identifier = args[++argidx]; if (design->scratchpad.count(identifier) > 0) - log_error("Assertion failed: scratchpad entry '%s' is defined\n", identifier.c_str()); + log_error("scratchpad entry '%s' is defined\n", identifier.c_str()); continue; } break; diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 8cb34e523..486b9313b 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -22,20 +22,6 @@ // Berkeley Logic Synthesis and Verification Group, ABC: A System for Sequential Synthesis and Verification // http://www.eecs.berkeley.edu/~alanmi/abc/ -#if 0 -// Based on &flow3 - better QoR but more experimental -#define ABC_COMMAND_LUT "&st; &ps -l; &sweep -v; &scorr; " \ - "&st; &if {W}; &save; &st; &syn2; &if {W} -v; &save; &load; "\ - "&st; &if -g -K 6; &dch -f; &if {W} -v; &save; &load; "\ - "&st; &if -g -K 6; &synch2; &if {W} -v; &save; &load; "\ - "&mfs; &ps -l" -#else -#define ABC_COMMAND_LUT "&st; &scorr; &sweep; &dc2; &st; &dch -f; &ps; &if {W} {D} -v; &mfs; &ps -l" -#endif - - -#define ABC_FAST_COMMAND_LUT "&st; &if {W} {D}" - #include "kernel/register.h" #include "kernel/sigtools.h" #include "kernel/celltypes.h" @@ -292,7 +278,8 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip } else abc9_script += stringf("source %s", script_file.c_str()); } else if (!lut_costs.empty() || !lut_file.empty()) { - abc9_script += fast_mode ? ABC_FAST_COMMAND_LUT : ABC_COMMAND_LUT; + abc9_script += fast_mode ? RTLIL::constpad.at("abc9.script.default.fast") + : RTLIL::constpad.at("abc9.script.default"); } else log_abort(); @@ -305,11 +292,14 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("{W}"); pos != std::string::npos; pos = abc9_script.find("{W}", pos)) abc9_script = abc9_script.substr(0, pos) + wire_delay + abc9_script.substr(pos+3); + for (size_t pos = abc9_script.find("{C}"); pos != std::string::npos; pos = abc9_script.find("{C}", pos)) + abc9_script = abc9_script.substr(0, pos) + design->scratchpad_get_string("abc9.if.C", "") + abc9_script.substr(pos+3); + if (nomfs) for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) abc9_script = abc9_script.erase(pos, strlen("&mfs")); - abc9_script += stringf("; &write -n %s/output.aig", tempdir_name.c_str()); + abc9_script += stringf("&ps -l; &write -n %s/output.aig", tempdir_name.c_str()); abc9_script = add_echos_to_abc9_cmd(abc9_script); for (size_t i = 0; i+1 < abc9_script.size(); i++) @@ -758,18 +748,15 @@ struct Abc9Pass : public Pass { log("\n"); log(" if no -script parameter is given, the following scripts are used:\n"); log("\n"); - log(" for -lut/-luts (only one LUT size):\n"); - log("%s\n", fold_abc9_cmd(ABC_COMMAND_LUT).c_str()); - log("\n"); - log(" for -lut/-luts (different LUT sizes):\n"); - log("%s\n", fold_abc9_cmd(ABC_COMMAND_LUT).c_str()); + log(" for -lut/-luts:\n"); + log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default")).c_str()); log("\n"); log(" -fast\n"); log(" use different default scripts that are slightly faster (at the cost\n"); log(" of output quality):\n"); log("\n"); log(" for -lut/-luts:\n"); - log("%s\n", fold_abc9_cmd(ABC_FAST_COMMAND_LUT).c_str()); + log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default.fast")).c_str()); log("\n"); log(" -D \n"); log(" set delay target. the string {D} in the default scripts above is\n"); @@ -883,9 +870,6 @@ struct Abc9Pass : public Pass { } if (arg == "-script" && argidx+1 < args.size()) { script_file = args[++argidx]; - rewrite_filename(script_file); - if (!script_file.empty() && !is_absolute_path(script_file) && script_file[0] != '+') - script_file = std::string(pwd) + "/" + script_file; continue; } if (arg == "-D" && argidx+1 < args.size()) { From e230fd8afef6483d546cb38616e63b05d4d9b42a Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 7 Jan 2020 13:08:59 -0800 Subject: [PATCH 02/22] Fix {C} substitution --- passes/techmap/abc9.cc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 486b9313b..d03c24fdb 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -292,8 +292,11 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("{W}"); pos != std::string::npos; pos = abc9_script.find("{W}", pos)) abc9_script = abc9_script.substr(0, pos) + wire_delay + abc9_script.substr(pos+3); + std::string C; + if (design->scratchpad.count("abc9.if.C")) + C = "-C " + design->scratchpad_get_string("abc9.if.C"); for (size_t pos = abc9_script.find("{C}"); pos != std::string::npos; pos = abc9_script.find("{C}", pos)) - abc9_script = abc9_script.substr(0, pos) + design->scratchpad_get_string("abc9.if.C", "") + abc9_script.substr(pos+3); + abc9_script = abc9_script.substr(0, pos) + C + abc9_script.substr(pos+3); if (nomfs) for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) From 050f03f15b01855d9c3bd6e98c4c47ebab607d57 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 8 Jan 2020 10:55:44 -0800 Subject: [PATCH 03/22] abc9: add time as last script command --- passes/techmap/abc9.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index d03c24fdb..652ccafaf 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -302,7 +302,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) abc9_script = abc9_script.erase(pos, strlen("&mfs")); - abc9_script += stringf("&ps -l; &write -n %s/output.aig", tempdir_name.c_str()); + abc9_script += stringf("&ps -l; &write -n %s/output.aig; time", tempdir_name.c_str()); abc9_script = add_echos_to_abc9_cmd(abc9_script); for (size_t i = 0; i+1 < abc9_script.size(); i++) From 0696b7bc9e4bd86eadd0e0b92696392cc5dc6172 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 8 Jan 2020 12:11:55 -0800 Subject: [PATCH 04/22] abc9: if -script value is a file, then source it, otherwise commands --- passes/techmap/abc9.cc | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 652ccafaf..5bcbb1611 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -267,16 +267,21 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip abc9_script += stringf("&read %s/input.xaig; &ps; ", tempdir_name.c_str()); if (!script_file.empty()) { - if (script_file[0] == '+') { - for (size_t i = 1; i < script_file.size(); i++) - if (script_file[i] == '\'') - abc9_script += "'\\''"; - else if (script_file[i] == ',') - abc9_script += " "; - else - abc9_script += script_file[i]; - } else + if (check_file_exists(script_file)) abc9_script += stringf("source %s", script_file.c_str()); + else { + if (script_file[0] == '+') { + for (size_t i = 1; i < script_file.size(); i++) + if (script_file[i] == '\'') + abc9_script += "'\\''"; + else if (script_file[i] == ',') + abc9_script += " "; + else + abc9_script += script_file[i]; + } + else + abc9_script += script_file; + } } else if (!lut_costs.empty() || !lut_file.empty()) { abc9_script += fast_mode ? RTLIL::constpad.at("abc9.script.default.fast") : RTLIL::constpad.at("abc9.script.default"); @@ -302,7 +307,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) abc9_script = abc9_script.erase(pos, strlen("&mfs")); - abc9_script += stringf("&ps -l; &write -n %s/output.aig; time", tempdir_name.c_str()); + abc9_script += stringf("; &ps -l; &write -n %s/output.aig; time", tempdir_name.c_str()); abc9_script = add_echos_to_abc9_cmd(abc9_script); for (size_t i = 0; i+1 < abc9_script.size(); i++) @@ -924,7 +929,7 @@ struct Abc9Pass : public Pass { extra_args(args, argidx, design); rewrite_filename(script_file); - if (!script_file.empty() && !is_absolute_path(script_file) && script_file[0] != '+') + if (!script_file.empty() && !is_absolute_path(script_file) && check_file_exists(script_file)) script_file = std::string(pwd) + "/" + script_file; // handle -lut / -luts args From 589ffead5cca63a55506eb3b291ffd025f0f9c0f Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 8 Jan 2020 12:13:06 -0800 Subject: [PATCH 05/22] scratchpad entry abc9.if.R to &if -R --- passes/techmap/abc9.cc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 5bcbb1611..3fdcc0e5c 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -303,6 +303,12 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("{C}"); pos != std::string::npos; pos = abc9_script.find("{C}", pos)) abc9_script = abc9_script.substr(0, pos) + C + abc9_script.substr(pos+3); + std::string R; + if (design->scratchpad.count("abc9.if.R")) + C = "-C " + design->scratchpad_get_string("abc9.if.R"); + for (size_t pos = abc9_script.find("{R}"); pos != std::string::npos; pos = abc9_script.find("{R}", pos)) + abc9_script = abc9_script.substr(0, pos) + C + abc9_script.substr(pos+3); + if (nomfs) for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) abc9_script = abc9_script.erase(pos, strlen("&mfs")); From fbd9636e08b9a4ac5e58161ca6a6b5308cd795cb Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 8 Jan 2020 12:15:01 -0800 Subject: [PATCH 06/22] Add abc9.if.script.flow{,2} to constpad --- kernel/yosys.cc | 38 ++++++++++++++++++++++++++++++++------ 1 file changed, 32 insertions(+), 6 deletions(-) diff --git a/kernel/yosys.cc b/kernel/yosys.cc index 6c8427c19..cd6955c3f 100644 --- a/kernel/yosys.cc +++ b/kernel/yosys.cc @@ -524,13 +524,39 @@ void yosys_setup() PyRun_SimpleString("import sys"); #endif - RTLIL::constpad["abc9.script.default"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} -v; &mfs"; - RTLIL::constpad["abc9.script.default.area"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} -a -v; &mfs"; - RTLIL::constpad["abc9.script.default.fast"] = "&if {W} {D}"; + RTLIL::constpad["abc9.script.default"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; + RTLIL::constpad["abc9.script.default.area"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; + RTLIL::constpad["abc9.script.default.fast"] = "&if {C} {W} {D} {R}"; + // Based on ABC's &flow + RTLIL::constpad["abc9.script.flow"] = "&scorr; &sweep;" \ + /* Round 1 */ \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + "&st; &dsdb;" \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + "&st; &syn2 -m -R 10; &dsdb;" \ + "&blut -a -K 6;" \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + /* Round 2 */ \ + "&st; &sopb;" \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + "&st; &dsdb;" \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + "&st; &syn2 -m -R 10; &dsdb;" \ + "&blut -a -K 6;" \ + "&unmap; &if {C} {W} {D} {R} -v; &mfs"; + // Based on ABC's &flow2 + RTLIL::constpad["abc9.script.flow2"] = "&scorr; &sweep;" \ + /* Comm1 */ "&synch2 -K 6 -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ + /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ + "&load; &st; &sopb -R 10 -C 4; " \ + /* Comm3 */ "&synch2 -K 6 -C 500; &if -m "/*"-E 5"*/" {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ + /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save; "\ + "&load"; + // Based on ABC's &flow3 RTLIL::constpad["abc9.script.flow3"] = "&scorr; &sweep;" \ - "&if {C} {W} {D}; &save; &st; &syn2; &if {C} {W} {D} -v; &save; &load; "\ - "&st; &if {C} -g -K 6; &dch -f; &if {C} {W} {D} -v; &save; &load; "\ - "&st; &if {C} -g -K 6; &synch2; &if {C} {W} {D} -v; &save; &load; "\ + "&if {C} {W} {D}; &save; &st; &syn2; &if {C} {W} {D} {R} -v; &save; &load;"\ + "&st; &if {C} -g -K 6; &dch -f; &if {C} {W} {D} {R} -v; &save; &load;"\ + "&st; &if {C} -g -K 6; &synch2; &if {C} {W} {D} {R} -v; &save; &load;"\ "&mfs"; Pass::init_register(); From 67c9c41f7e566f5604a3e38e7ad402d6b5c80fd8 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 9 Jan 2020 17:10:54 -0800 Subject: [PATCH 07/22] Move abc9.* constpad entries to Abc9Pass::on_register() --- kernel/yosys.cc | 35 ----------------------------------- passes/techmap/abc9.cc | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 35 deletions(-) diff --git a/kernel/yosys.cc b/kernel/yosys.cc index 6956cbdc3..8190d8902 100644 --- a/kernel/yosys.cc +++ b/kernel/yosys.cc @@ -524,41 +524,6 @@ void yosys_setup() PyRun_SimpleString("import sys"); #endif - RTLIL::constpad["abc9.script.default"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; - RTLIL::constpad["abc9.script.default.area"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; - RTLIL::constpad["abc9.script.default.fast"] = "&if {C} {W} {D} {R}"; - // Based on ABC's &flow - RTLIL::constpad["abc9.script.flow"] = "&scorr; &sweep;" \ - /* Round 1 */ \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ - "&st; &dsdb;" \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ - "&st; &syn2 -m -R 10; &dsdb;" \ - "&blut -a -K 6;" \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ - /* Round 2 */ \ - "&st; &sopb;" \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ - "&st; &dsdb;" \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ - "&st; &syn2 -m -R 10; &dsdb;" \ - "&blut -a -K 6;" \ - "&unmap; &if {C} {W} {D} {R} -v; &mfs"; - // Based on ABC's &flow2 - RTLIL::constpad["abc9.script.flow2"] = "&scorr; &sweep;" \ - /* Comm1 */ "&synch2 -K 6 -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ - /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ - "&load; &st; &sopb -R 10 -C 4; " \ - /* Comm3 */ "&synch2 -K 6 -C 500; &if -m "/*"-E 5"*/" {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ - /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save; "\ - "&load"; - // Based on ABC's &flow3 - RTLIL::constpad["abc9.script.flow3"] = "&scorr; &sweep;" \ - "&if {C} {W} {D}; &save; &st; &syn2; &if {C} {W} {D} {R} -v; &save; &load;"\ - "&st; &if {C} -g -K 6; &dch -f; &if {C} {W} {D} {R} -v; &save; &load;"\ - "&st; &if {C} -g -K 6; &synch2; &if {C} {W} {D} {R} -v; &save; &load;"\ - "&mfs"; - Pass::init_register(); yosys_design = new RTLIL::Design; yosys_celltypes.setup(); diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 3fdcc0e5c..3f05494c7 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -735,6 +735,43 @@ clone_lut: struct Abc9Pass : public Pass { Abc9Pass() : Pass("abc9", "use ABC9 for technology mapping") { } + void on_register() YS_OVERRIDE + { + RTLIL::constpad["abc9.script.default"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; + RTLIL::constpad["abc9.script.default.area"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; + RTLIL::constpad["abc9.script.default.fast"] = "&if {C} {W} {D} {R}"; + // Based on ABC's &flow + RTLIL::constpad["abc9.script.flow"] = "&scorr; &sweep;" \ + /* Round 1 */ \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + "&st; &dsdb;" \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + "&st; &syn2 -m -R 10; &dsdb;" \ + "&blut -a -K 6;" \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + /* Round 2 */ \ + "&st; &sopb;" \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + "&st; &dsdb;" \ + "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + "&st; &syn2 -m -R 10; &dsdb;" \ + "&blut -a -K 6;" \ + "&unmap; &if {C} {W} {D} {R} -v; &mfs"; + // Based on ABC's &flow2 + RTLIL::constpad["abc9.script.flow2"] = "&scorr; &sweep;" \ + /* Comm1 */ "&synch2 -K 6 -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ + /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ + "&load; &st; &sopb -R 10 -C 4; " \ + /* Comm3 */ "&synch2 -K 6 -C 500; &if -m "/*"-E 5"*/" {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ + /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save; "\ + "&load"; + // Based on ABC's &flow3 + RTLIL::constpad["abc9.script.flow3"] = "&scorr; &sweep;" \ + "&if {C} {W} {D}; &save; &st; &syn2; &if {C} {W} {D} {R} -v; &save; &load;"\ + "&st; &if {C} -g -K 6; &dch -f; &if {C} {W} {D} {R} -v; &save; &load;"\ + "&st; &if {C} -g -K 6; &synch2; &if {C} {W} {D} {R} -v; &save; &load;"\ + "&mfs"; + } void help() YS_OVERRIDE { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| From ef3e84aac97565caff1f7d9bbce459d1592318ad Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 9 Jan 2020 17:11:09 -0800 Subject: [PATCH 08/22] Revert "abc9: if -script value is a file, then source it, otherwise commands" This reverts commit 0696b7bc9e4bd86eadd0e0b92696392cc5dc6172. --- passes/techmap/abc9.cc | 27 +++++++++++---------------- 1 file changed, 11 insertions(+), 16 deletions(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 3f05494c7..e8988f699 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -267,21 +267,16 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip abc9_script += stringf("&read %s/input.xaig; &ps; ", tempdir_name.c_str()); if (!script_file.empty()) { - if (check_file_exists(script_file)) + if (script_file[0] == '+') { + for (size_t i = 1; i < script_file.size(); i++) + if (script_file[i] == '\'') + abc9_script += "'\\''"; + else if (script_file[i] == ',') + abc9_script += " "; + else + abc9_script += script_file[i]; + } else abc9_script += stringf("source %s", script_file.c_str()); - else { - if (script_file[0] == '+') { - for (size_t i = 1; i < script_file.size(); i++) - if (script_file[i] == '\'') - abc9_script += "'\\''"; - else if (script_file[i] == ',') - abc9_script += " "; - else - abc9_script += script_file[i]; - } - else - abc9_script += script_file; - } } else if (!lut_costs.empty() || !lut_file.empty()) { abc9_script += fast_mode ? RTLIL::constpad.at("abc9.script.default.fast") : RTLIL::constpad.at("abc9.script.default"); @@ -313,7 +308,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) abc9_script = abc9_script.erase(pos, strlen("&mfs")); - abc9_script += stringf("; &ps -l; &write -n %s/output.aig; time", tempdir_name.c_str()); + abc9_script += stringf("&ps -l; &write -n %s/output.aig; time", tempdir_name.c_str()); abc9_script = add_echos_to_abc9_cmd(abc9_script); for (size_t i = 0; i+1 < abc9_script.size(); i++) @@ -972,7 +967,7 @@ struct Abc9Pass : public Pass { extra_args(args, argidx, design); rewrite_filename(script_file); - if (!script_file.empty() && !is_absolute_path(script_file) && check_file_exists(script_file)) + if (!script_file.empty() && !is_absolute_path(script_file) && script_file[0] != '+') script_file = std::string(pwd) + "/" + script_file; // handle -lut / -luts args From ca70f9650336b4e58a13ab119e098f6494549f27 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 9 Jan 2020 17:17:47 -0800 Subject: [PATCH 09/22] abc9.script.* constpad entries to start with '+' --- passes/techmap/abc9.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index e8988f699..7039d4dd8 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -278,8 +278,8 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip } else abc9_script += stringf("source %s", script_file.c_str()); } else if (!lut_costs.empty() || !lut_file.empty()) { - abc9_script += fast_mode ? RTLIL::constpad.at("abc9.script.default.fast") - : RTLIL::constpad.at("abc9.script.default"); + abc9_script += fast_mode ? RTLIL::constpad.at("abc9.script.default.fast").substr(1,std::string::npos) + : RTLIL::constpad.at("abc9.script.default").substr(1,std::string::npos); } else log_abort(); @@ -732,11 +732,11 @@ struct Abc9Pass : public Pass { Abc9Pass() : Pass("abc9", "use ABC9 for technology mapping") { } void on_register() YS_OVERRIDE { - RTLIL::constpad["abc9.script.default"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; - RTLIL::constpad["abc9.script.default.area"] = "&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; - RTLIL::constpad["abc9.script.default.fast"] = "&if {C} {W} {D} {R}"; + RTLIL::constpad["abc9.script.default"] = "+&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; + RTLIL::constpad["abc9.script.default.area"] = "+&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; + RTLIL::constpad["abc9.script.default.fast"] = "+&if {C} {W} {D} {R}"; // Based on ABC's &flow - RTLIL::constpad["abc9.script.flow"] = "&scorr; &sweep;" \ + RTLIL::constpad["abc9.script.flow"] = "+&scorr; &sweep;" \ /* Round 1 */ \ "&unmap; &if {C} {W} {D} {R}; &mfs;" \ "&st; &dsdb;" \ @@ -753,7 +753,7 @@ struct Abc9Pass : public Pass { "&blut -a -K 6;" \ "&unmap; &if {C} {W} {D} {R} -v; &mfs"; // Based on ABC's &flow2 - RTLIL::constpad["abc9.script.flow2"] = "&scorr; &sweep;" \ + RTLIL::constpad["abc9.script.flow2"] = "+&scorr; &sweep;" \ /* Comm1 */ "&synch2 -K 6 -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ "&load; &st; &sopb -R 10 -C 4; " \ @@ -761,7 +761,7 @@ struct Abc9Pass : public Pass { /* Comm2 */ "&dch -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save; "\ "&load"; // Based on ABC's &flow3 - RTLIL::constpad["abc9.script.flow3"] = "&scorr; &sweep;" \ + RTLIL::constpad["abc9.script.flow3"] = "+&scorr; &sweep;" \ "&if {C} {W} {D}; &save; &st; &syn2; &if {C} {W} {D} {R} -v; &save; &load;"\ "&st; &if {C} -g -K 6; &dch -f; &if {C} {W} {D} {R} -v; &save; &load;"\ "&st; &if {C} -g -K 6; &synch2; &if {C} {W} {D} {R} -v; &save; &load;"\ From 32946a402de068ba052e0af9564959cf746fbf91 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 9 Jan 2020 17:35:13 -0800 Subject: [PATCH 10/22] abc9: start post-fix with semicolon --- passes/techmap/abc9.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 7039d4dd8..fb0c547a3 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -308,7 +308,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) abc9_script = abc9_script.erase(pos, strlen("&mfs")); - abc9_script += stringf("&ps -l; &write -n %s/output.aig; time", tempdir_name.c_str()); + abc9_script += stringf("; &ps -l; &write -n %s/output.aig; time", tempdir_name.c_str()); abc9_script = add_echos_to_abc9_cmd(abc9_script); for (size_t i = 0; i+1 < abc9_script.size(); i++) From 8b6309747b302f11046be029d5f224ba891d0461 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 9 Jan 2020 17:49:56 -0800 Subject: [PATCH 11/22] Add '-v' to &if for abc9.script.default.fast --- passes/techmap/abc9.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index fb0c547a3..aed662fc5 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -734,7 +734,7 @@ struct Abc9Pass : public Pass { { RTLIL::constpad["abc9.script.default"] = "+&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -v; &mfs"; RTLIL::constpad["abc9.script.default.area"] = "+&scorr; &sweep; &dc2; &dch -f; &ps; &if {C} {W} {D} {R} -a -v; &mfs"; - RTLIL::constpad["abc9.script.default.fast"] = "+&if {C} {W} {D} {R}"; + RTLIL::constpad["abc9.script.default.fast"] = "+&if {C} {W} {D} {R} -v"; // Based on ABC's &flow RTLIL::constpad["abc9.script.flow"] = "+&scorr; &sweep;" \ /* Round 1 */ \ From e378902f939c24cb8f6cbff29c3f508a4655f3ab Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 9 Jan 2020 18:16:58 -0800 Subject: [PATCH 12/22] Tune abc9.script.flow --- passes/techmap/abc9.cc | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index aed662fc5..b828404bc 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -737,21 +737,29 @@ struct Abc9Pass : public Pass { RTLIL::constpad["abc9.script.default.fast"] = "+&if {C} {W} {D} {R} -v"; // Based on ABC's &flow RTLIL::constpad["abc9.script.flow"] = "+&scorr; &sweep;" \ + "&dch -C 500;" \ /* Round 1 */ \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + /* Map 1 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;" \ "&st; &dsdb;" \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + /* Map 2 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;" \ "&st; &syn2 -m -R 10; &dsdb;" \ "&blut -a -K 6;" \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + /* Map 3 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;" \ /* Round 2 */ \ "&st; &sopb;" \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + /* Map 1 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;" \ "&st; &dsdb;" \ - "&unmap; &if {C} {W} {D} {R}; &mfs;" \ + /* Map 2 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;" \ "&st; &syn2 -m -R 10; &dsdb;" \ "&blut -a -K 6;" \ - "&unmap; &if {C} {W} {D} {R} -v; &mfs"; + /* Map 3 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;" \ + /* Round 3 */ \ + /* Map 1 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;" \ + "&st; &dsdb;" \ + /* Map 2 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;" \ + "&st; &syn2 -m -R 10; &dsdb;" \ + "&blut -a -K 6;" \ + /* Map 3 */ "&unmap; &if {C} {W} {D} {R} -v; &save; &load; &mfs;"; // Based on ABC's &flow2 RTLIL::constpad["abc9.script.flow2"] = "+&scorr; &sweep;" \ /* Comm1 */ "&synch2 -K 6 -C 500; &if -m {C} {W} {D} {R} -v; &mfs "/*"-W 4 -M 500 -C 7000"*/"; &save;"\ From a10016ccc57638aa837acd76fc93f296eda83b32 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 9 Jan 2020 18:17:06 -0800 Subject: [PATCH 13/22] Add abc9 sanity test --- tests/techmap/abc9.ys | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 tests/techmap/abc9.ys diff --git a/tests/techmap/abc9.ys b/tests/techmap/abc9.ys new file mode 100644 index 000000000..20f263da8 --- /dev/null +++ b/tests/techmap/abc9.ys @@ -0,0 +1,40 @@ +read_verilog < Date: Fri, 10 Jan 2020 10:00:09 -0800 Subject: [PATCH 14/22] abc9: fix typos --- passes/techmap/abc9.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index b828404bc..22f5a1f3a 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -300,9 +300,9 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip std::string R; if (design->scratchpad.count("abc9.if.R")) - C = "-C " + design->scratchpad_get_string("abc9.if.R"); + R = "-R " + design->scratchpad_get_string("abc9.if.R"); for (size_t pos = abc9_script.find("{R}"); pos != std::string::npos; pos = abc9_script.find("{R}", pos)) - abc9_script = abc9_script.substr(0, pos) + C + abc9_script.substr(pos+3); + abc9_script = abc9_script.substr(0, pos) + R + abc9_script.substr(pos+3); if (nomfs) for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) @@ -803,14 +803,14 @@ struct Abc9Pass : public Pass { log(" if no -script parameter is given, the following scripts are used:\n"); log("\n"); log(" for -lut/-luts:\n"); - log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default")).c_str()); + log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default")).c_str()+1); log("\n"); log(" -fast\n"); log(" use different default scripts that are slightly faster (at the cost\n"); log(" of output quality):\n"); log("\n"); log(" for -lut/-luts:\n"); - log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default.fast")).c_str()); + log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default.fast")).c_str()+1); log("\n"); log(" -D \n"); log(" set delay target. the string {D} in the default scripts above is\n"); From 291530c59f639609bc7534e561f28c9fb4081e19 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 10 Jan 2020 15:04:13 -0800 Subject: [PATCH 15/22] abc9: add abc9.verify and abc9.debug options --- passes/techmap/abc9.cc | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 22f5a1f3a..3ce435dd0 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -308,7 +308,14 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) abc9_script = abc9_script.erase(pos, strlen("&mfs")); - abc9_script += stringf("; &ps -l; &write -n %s/output.aig; time", tempdir_name.c_str()); + abc9_script += stringf("; &ps -l; &write -n %s/output.aig;", tempdir_name.c_str()); + if (design->scratchpad_get_bool("abc9.debug")) { + if (dff_mode) + abc9_script += "verify -s;"; + else + abc9_script += "verify;"; + } + abc9_script += "time"; abc9_script = add_echos_to_abc9_cmd(abc9_script); for (size_t i = 0; i+1 < abc9_script.size(); i++) @@ -910,6 +917,11 @@ struct Abc9Pass : public Pass { } nomfs = design->scratchpad_get_bool("abc9.nomfs", nomfs); + if (design->scratchpad_get_bool("abc9.debug")) { + cleanup = false; + show_tempdir = true; + } + size_t argidx; char pwd [PATH_MAX]; if (!getcwd(pwd, sizeof(pwd))) { From 7d94e18100a6fe61805e94e754b199826571e7ef Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 10 Jan 2020 15:07:46 -0800 Subject: [PATCH 16/22] synth_xilinx: synth_xilinx.abc9.xc7.W to replace XC7_WIRE_DELAY macro --- techlibs/xilinx/synth_xilinx.cc | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 51d2cbbd2..5867f5d1c 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -26,13 +26,16 @@ USING_YOSYS_NAMESPACE PRIVATE_NAMESPACE_BEGIN -#define XC7_WIRE_DELAY 300 // Number with which ABC will map a 6-input gate - // to one LUT6 (instead of a LUT5 + LUT2) - struct SynthXilinxPass : public ScriptPass { SynthXilinxPass() : ScriptPass("synth_xilinx", "synthesis for Xilinx FPGAs") { } + void on_register() YS_OVERRIDE + { + RTLIL::constpad["synth_xilinx.abc9.xc7.W"] = "300"; // Number with which ABC will map a 6-input gate + // to one LUT6 (instead of a LUT5 + LUT2) + } + void help() YS_OVERRIDE { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| @@ -555,7 +558,11 @@ struct SynthXilinxPass : public ScriptPass run("techmap " + techmap_args); run("read_verilog -icells -lib +/xilinx/abc9_model.v"); std::string abc9_opts = " -box +/xilinx/abc9_xc7.box"; - abc9_opts += stringf(" -W %d", XC7_WIRE_DELAY); + auto k = stringf("synth_xilinx.abc9.%s.W", family.c_str()); + if (active_design->scratchpad.count(k)) + abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k).c_str()); + else + abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k).c_str()); abc9_opts += " -nomfs"; if (nowidelut) abc9_opts += " -lut +/xilinx/abc9_xc7_nowide.lut"; From ed2aeb498eb7bbe028ece4adf96b94bacd0b3ef0 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 10 Jan 2020 15:09:42 -0800 Subject: [PATCH 17/22] Copy-pasta --- passes/techmap/abc9.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 3ce435dd0..387d9b644 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -309,7 +309,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip abc9_script = abc9_script.erase(pos, strlen("&mfs")); abc9_script += stringf("; &ps -l; &write -n %s/output.aig;", tempdir_name.c_str()); - if (design->scratchpad_get_bool("abc9.debug")) { + if (design->scratchpad_get_bool("abc9.verify")) { if (dff_mode) abc9_script += "verify -s;"; else From c8206823141aa54b6151c57548fdb73211157451 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sat, 11 Jan 2020 12:11:35 -0800 Subject: [PATCH 18/22] abc9: fix help message, found by @nakengelhardt --- passes/techmap/abc9.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index 387d9b644..ec80e098f 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -810,14 +810,14 @@ struct Abc9Pass : public Pass { log(" if no -script parameter is given, the following scripts are used:\n"); log("\n"); log(" for -lut/-luts:\n"); - log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default")).c_str()+1); + log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default").substr(1,std::string::npos)).c_str()); log("\n"); log(" -fast\n"); log(" use different default scripts that are slightly faster (at the cost\n"); log(" of output quality):\n"); log("\n"); log(" for -lut/-luts:\n"); - log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default.fast")).c_str()+1); + log("%s\n", fold_abc9_cmd(RTLIL::constpad.at("abc9.script.default.fast").substr(1,std::string::npos)).c_str()); log("\n"); log(" -D \n"); log(" set delay target. the string {D} in the default scripts above is\n"); From 556ed0e18ac00e4ec19e127f33ccf3550be78186 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sat, 11 Jan 2020 17:05:30 -0800 Subject: [PATCH 19/22] MIssed this merge conflict --- passes/techmap/abc9.cc | 4 ---- 1 file changed, 4 deletions(-) diff --git a/passes/techmap/abc9.cc b/passes/techmap/abc9.cc index bd4e506ac..8a6195741 100644 --- a/passes/techmap/abc9.cc +++ b/passes/techmap/abc9.cc @@ -304,10 +304,6 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip for (size_t pos = abc9_script.find("{R}"); pos != std::string::npos; pos = abc9_script.find("{R}", pos)) abc9_script = abc9_script.substr(0, pos) + R + abc9_script.substr(pos+3); - if (nomfs) - for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) - abc9_script = abc9_script.erase(pos, strlen("&mfs")); - abc9_script += stringf("; &ps -l; &write -n %s/output.aig;", tempdir_name.c_str()); if (design->scratchpad_get_bool("abc9.verify")) { if (dff_mode) From 35e49fde4dfa67030a3e80d0bdf700c97258ed45 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sat, 11 Jan 2020 18:57:25 -0800 Subject: [PATCH 20/22] Another conflict --- techlibs/xilinx/synth_xilinx.cc | 1 - 1 file changed, 1 deletion(-) diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 5867f5d1c..d916093dc 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -563,7 +563,6 @@ struct SynthXilinxPass : public ScriptPass abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k).c_str()); else abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k).c_str()); - abc9_opts += " -nomfs"; if (nowidelut) abc9_opts += " -lut +/xilinx/abc9_xc7_nowide.lut"; else From c0b55deb0bb189d1b6343b5d209f7fc4ac251596 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sun, 12 Jan 2020 11:26:05 -0800 Subject: [PATCH 21/22] synth_ice40: -abc2 to always use `abc` even if `-abc9` --- techlibs/ice40/synth_ice40.cc | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 463c2063a..121bcff1f 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -102,8 +102,8 @@ struct SynthIce40Pass : public ScriptPass log("\n"); } - string top_opt, blif_file, edif_file, json_file, abc, device_opt; - bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr; + string top_opt, blif_file, edif_file, json_file, device_opt; + bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr, abc9; int min_ce_use; void clear_flags() YS_OVERRIDE @@ -122,7 +122,7 @@ struct SynthIce40Pass : public ScriptPass noabc = false; abc2 = false; vpr = false; - abc = "abc"; + abc9 = false; device_opt = "hx"; } @@ -207,7 +207,7 @@ struct SynthIce40Pass : public ScriptPass continue; } if (args[argidx] == "-abc9") { - abc = "abc9"; + abc9 = true; continue; } if (args[argidx] == "-device" && argidx+1 < args.size()) { @@ -223,7 +223,7 @@ struct SynthIce40Pass : public ScriptPass if (device_opt != "hx" && device_opt != "lp" && device_opt !="u") log_cmd_error("Invalid or no device specified: '%s'\n", device_opt.c_str()); - if (abc == "abc9" && retime) + if (abc9 && retime) log_cmd_error("-retime option not currently compatible with -abc9!\n"); log_header(design, "Executing SYNTH_ICE40 pass.\n"); @@ -316,7 +316,7 @@ struct SynthIce40Pass : public ScriptPass run("techmap -map +/techmap.v -map +/ice40/arith_map.v"); } if (retime || help_mode) - run(abc + " -dff -D 1", "(only if -retime)"); + run("abc -dff -D 1", "(only if -retime)"); run("ice40_opt"); } @@ -340,7 +340,7 @@ struct SynthIce40Pass : public ScriptPass if (check_label("map_luts")) { if (abc2 || help_mode) { - run(abc, " (only if -abc2)"); + run("abc", " (only if -abc2)"); run("ice40_opt", "(only if -abc2)"); } run("techmap -map +/ice40/latches_map.v"); @@ -349,7 +349,7 @@ struct SynthIce40Pass : public ScriptPass run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)"); } if (!noabc) { - if (abc == "abc9") { + if (abc9) { run("read_verilog -icells -lib +/ice40/abc9_model.v"); int wire_delay; if (device_opt == "lp") @@ -358,10 +358,10 @@ struct SynthIce40Pass : public ScriptPass wire_delay = 750; else wire_delay = 250; - run(abc + stringf(" -W %d -lut +/ice40/abc9_%s.lut -box +/ice40/abc9_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str()), "(skip if -noabc)"); + run(stringf("abc9 -W %d -lut +/ice40/abc9_%s.lut -box +/ice40/abc9_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str())); } else - run(abc + " -dress -lut 4", "(skip if -noabc)"); + run("abc -dress -lut 4", "(skip if -noabc)"); } run("ice40_wrapcarry -unwrap"); run("techmap -D NO_LUT -map +/ice40/cells_map.v"); From ae619ba87a58ee530549206eee7f5ea1ad8e1072 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sun, 12 Jan 2020 15:21:26 -0800 Subject: [PATCH 22/22] Add #1626 testcase --- tests/arch/ice40/bug1626.ys | 217 ++++++++++++++++++++++++++++++++++++ 1 file changed, 217 insertions(+) create mode 100644 tests/arch/ice40/bug1626.ys diff --git a/tests/arch/ice40/bug1626.ys b/tests/arch/ice40/bug1626.ys new file mode 100644 index 000000000..27b6fb5e8 --- /dev/null +++ b/tests/arch/ice40/bug1626.ys @@ -0,0 +1,217 @@ +read_ilang <