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gate2lut: new techlib, for converting Yosys gates to FPGA LUTs.

This commit is contained in:
whitequark 2018-12-05 04:50:38 +00:00
parent 12596b5003
commit 9ef078848a
10 changed files with 133 additions and 0 deletions

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@ -25,5 +25,6 @@ $(eval $(call add_share_file,share,techlibs/common/techmap.v))
$(eval $(call add_share_file,share,techlibs/common/pmux2mux.v))
$(eval $(call add_share_file,share,techlibs/common/adff2dff.v))
$(eval $(call add_share_file,share,techlibs/common/dff2ff.v))
$(eval $(call add_share_file,share,techlibs/common/gate2lut.v))
$(eval $(call add_share_file,share,techlibs/common/cells.lib))