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presentation progress
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@ -267,7 +267,7 @@ memory -nomap; techmap -map my_memory_map.v; memory_map
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\end{lstlisting}
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\end{lstlisting}
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\end{frame}
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\end{frame}
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\begin{frame}[t, fragile]{\subsecname{} -- Example 1/TBD}
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\begin{frame}[t, fragile]{\subsecname{} -- Example 1/2}
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\vbox to 0cm{\includegraphics[width=\linewidth,trim=0cm 0cm 0cm -10cm]{PRESENTATION_ExSyn/memory_01.pdf}\vss}
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\vbox to 0cm{\includegraphics[width=\linewidth,trim=0cm 0cm 0cm -10cm]{PRESENTATION_ExSyn/memory_01.pdf}\vss}
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\vskip-1cm
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\vskip-1cm
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\begin{columns}
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\begin{columns}
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@ -278,7 +278,7 @@ memory -nomap; techmap -map my_memory_map.v; memory_map
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\end{columns}
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\end{columns}
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\end{frame}
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\end{frame}
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\begin{frame}[t, fragile]{\subsecname{} -- Example 2/TBD}
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\begin{frame}[t, fragile]{\subsecname{} -- Example 2/2}
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\vbox to 0cm{\hfill\includegraphics[width=7.5cm,trim=0cm 0cm 0cm -6cm]{PRESENTATION_ExSyn/memory_02.pdf}\vss}
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\vbox to 0cm{\hfill\includegraphics[width=7.5cm,trim=0cm 0cm 0cm -6cm]{PRESENTATION_ExSyn/memory_02.pdf}\vss}
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\vskip-1cm
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\vskip-1cm
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\begin{columns}
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\begin{columns}
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@ -293,8 +293,52 @@ memory -nomap; techmap -map my_memory_map.v; memory_map
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\subsection{The ``fsm'' commands}
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\subsection{The ``fsm'' commands}
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\begin{frame}{\subsecname}
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\begin{frame}[fragile]{\subsecname{}}
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TBD
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The {\tt fsm} command identifies, extracts, optimizes (re-encodes), and
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re-synthesizes finite state machines. It again is a macro that calls
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a series of other commands:
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\begin{lstlisting}[xleftmargin=0.5cm, basicstyle=\ttfamily\fontsize{8pt}{10pt}\selectfont]
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fsm_detect # unless got option -nodetect
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fsm_extract
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fsm_opt
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opt_clean
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fsm_opt
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fsm_expand # if got option -expand
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opt_clean # if got option -expand
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fsm_opt # if got option -expand
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fsm_recode # unless got option -norecode
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fsm_info
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fsm_export # if got option -export
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fsm_map # unless got option -nomap
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\end{lstlisting}
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\end{frame}
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\begin{frame}{\subsecname{} -- details}
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Some details on the most importand commands from the {\tt fsm\_*} group:
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\bigskip
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The {\tt fsm\_detect} command identifies FSM state registers and marks them
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with the {\tt (* fsm\_encoding = "auto" *)} attribute, if they do not have the
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{\tt fsm\_encoding} set already. Mark registers with {\tt (* fsm\_encoding =
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"none" *)} to disable FSM optimization for a register.
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\bigskip
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The {\tt fsm\_extract} command replaces the entire FSM (logic and state
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registers) with a {\tt \$fsm} cell.
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\bigskip
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The commands {\tt fsm\_opt} and {\tt fsm\_recode} can be used to optimize the
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FSM.
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\bigskip
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Finally the {\tt fsm\_map} command can be used to convert the (optimized) {\tt
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\$fsm} cell back to logic and registers.
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\end{frame}
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\end{frame}
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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@ -92,15 +92,15 @@ synthesis. It supports most of Verilog-2005 and is well tested with
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real-world designs from the ASIC and FPGA world.
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real-world designs from the ASIC and FPGA world.
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\bigskip
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\bigskip
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Learn how to use Yosys to create your own custom synthesis flows and discover
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Learn how to use Yosys to create your own custom synthesis flows and
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why open source HDL synthesis is important for researchers, hobbyists,
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discover why open source HDL synthesis is important for researchers,
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educators and engineers alike.
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hobbyists, educators and engineers alike.
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\bigskip
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\bigskip
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This presentation covers basic concepts of Yosys, creating simple synthesis
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This presentation covers basic concepts of Yosys, writing synthesis scripts
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scripts, creating synthesis scripts for advanced applications, creating Yosys
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for a wide range of applications, creating Yosys scripts for various
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scripts for non-synthesis applications (such as formal equivialence checking)
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non-synthesis applications (such as formal equivialence checking) and
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and writing extensions to Yosys using the C++ API.
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writing extensions to Yosys using the C++ API.
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\end{frame}
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\end{frame}
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\section{Outline}
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\section{Outline}
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