mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-10-31 03:32:29 +00:00 
			
		
		
		
	Merge pull request #2330 from antmicro/arrays-fix-multirange-access
Fix unsupported subarray access detection
This commit is contained in:
		
						commit
						9e937961dc
					
				
					 2 changed files with 13 additions and 1 deletions
				
			
		|  | @ -1523,7 +1523,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, | |||
| 
 | ||||
| 		for (int i = 0; 2*i < GetSize(id2ast->multirange_dimensions); i++) | ||||
| 		{ | ||||
| 			if (GetSize(children[0]->children) < i) | ||||
| 			if (GetSize(children[0]->children) <= i) | ||||
| 				log_file_error(filename, location.first_line, "Insufficient number of array indices for %s.\n", log_id(str)); | ||||
| 
 | ||||
| 			AstNode *new_index_expr = children[0]->children[i]->children.at(0)->clone(); | ||||
|  |  | |||
							
								
								
									
										12
									
								
								tests/svtypes/multirange_subarray_access.ys
									
										
									
									
									
										Normal file
									
								
							
							
						
						
									
										12
									
								
								tests/svtypes/multirange_subarray_access.ys
									
										
									
									
									
										Normal file
									
								
							|  | @ -0,0 +1,12 @@ | |||
| logger -expect error "Insufficient number of array indices for a." 1 | ||||
| read_verilog -sv <<EOT | ||||
| module foo; | ||||
| logic a [6:0][4:0][1:0]; | ||||
| logic b [1:0]; | ||||
| 
 | ||||
| assign a[0][0][0] = 1'b0; | ||||
| assign a[0][0][1] = 1'b1; | ||||
| assign b = a[0][0]; | ||||
| 
 | ||||
| endmodule | ||||
| EOT | ||||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue