3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-28 19:35:53 +00:00

opt_lut: new pass, to combine LUTs for tighter packing.

This commit is contained in:
whitequark 2018-12-05 00:23:22 +00:00
parent 1719aa88ac
commit 9e072ec21f
8 changed files with 320 additions and 1 deletions

3
tests/opt/ice40_carry.v Normal file
View file

@ -0,0 +1,3 @@
module SB_CARRY (output CO, input I0, I1, CI);
assign CO = (I0 && I1) || ((I0 || I1) && CI);
endmodule