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	abstract: fix -init log_debug bit count, remove unnecessary log_debug
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					 1 changed files with 3 additions and 3 deletions
				
			
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			@ -35,7 +35,6 @@ bool abstract_state_port(FfData& ff, SigSpec& port_sig, std::set<int> offsets, E
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	int abstracted_idx = 0;
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	for (int d_idx = 0; d_idx < ff.width; d_idx++) {
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		if (offsets.count(d_idx)) {
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			log_debug("bit %d: abstracted\n", d_idx);
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			mux_input.append(port_sig[d_idx]);
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			port_sig[d_idx].wire = abstracted;
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			port_sig[d_idx].offset = abstracted_idx;
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			@ -49,6 +48,7 @@ bool abstract_state_port(FfData& ff, SigSpec& port_sig, std::set<int> offsets, E
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}
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using SelReason=std::variant<Wire*, Cell*>;
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dict<SigBit, std::vector<SelReason>> gather_selected_reps(Module* mod, SigMap& sigmap) {
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	dict<SigBit, std::vector<SelReason>> selected_reps;
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			@ -129,7 +129,6 @@ bool abstract_value_port(Module* mod, Cell* cell, std::set<int> offsets, IdStrin
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	int to_abstract_idx = 0;
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	for (int port_idx = 0; port_idx < old_port.size(); port_idx++) {
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		if (offsets.count(port_idx)) {
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			log_debug("bit %d: abstracted\n", port_idx);
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			mux_output.append(old_port[port_idx]);
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			SigBit in_bit {to_abstract, to_abstract_idx};
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			new_port.replace(port_idx, in_bit);
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			@ -178,6 +177,7 @@ unsigned int abstract_init(Module* mod) {
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			// TODO these don't seem too informative
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			log_debug("Removing init bit on %s due to selected wire %s\n", log_signal(bit), wire->name.c_str());
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			initvals.remove_init(bit);
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			changed++;
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		}
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	for (auto cell : mod->selected_cells())
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			@ -186,6 +186,7 @@ unsigned int abstract_init(Module* mod) {
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				for (auto bit : conn.second.bits()) {
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					log_debug("Removing init bit on %s due to selected cell %s\n", log_signal(bit), cell->name.c_str());
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					initvals.remove_init(bit);
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					changed++;
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				}
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	return changed;
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}
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			@ -245,7 +246,6 @@ struct AbstractPass : public Pass {
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			if (!enable_name.length())
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				log_cmd_error("Unspecified enable wire\n");
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			for (auto mod : design->selected_modules()) {
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				log_debug("module %s\n", mod->name.c_str());
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				Wire *enable_wire = mod->wire("\\" + enable_name);
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				if (!enable_wire)
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					log_cmd_error("Enable wire %s not found in module %s\n", enable_name.c_str(), mod->name.c_str());
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