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TimingInfo: index by (port_name,offset)

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This commit is contained in:
Eddie Hung 2020-02-18 08:41:48 -08:00
parent 7c3b4b80ea
commit 9dcf204dec
2 changed files with 23 additions and 12 deletions
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7
passes/techmap/abc9_ops.cc
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@ -473,11 +473,11 @@ void prep_lut(RTLIL::Design *design, int maxlut)
auto &t = timing.setup_module(module);
SigBit o;
TimingInfo::NameBit o;
std::vector<int> specify;
for (const auto &i : t.comb) {
auto &d = i.first.second;
if (o == SigBit())
if (o == TimingInfo::NameBit())
o = d;
else if (o != d)
log_error("(* abc9_lut *) module '%s' with has more than one output.\n", log_id(module));
@ -581,7 +581,8 @@ void prep_box(RTLIL::Design *design, bool dff_mode)
first = false;
else
ss << " ";
auto it = t.find(wire);
log_assert(GetSize(wire) == 1);
auto it = t.find(SigBit(wire,0));
if (it == t.end())
// Assume that no setup time means zero
ss << 0;