mirror of
https://github.com/YosysHQ/yosys
synced 2026-04-15 16:54:12 +00:00
flatten: skip $input_port cells in template module
This commit is contained in:
parent
debc2c3977
commit
9d3928c014
1 changed files with 2 additions and 0 deletions
|
|
@ -178,6 +178,8 @@ struct FlattenWorker
|
|||
}
|
||||
|
||||
for (auto tpl_cell : tpl->cells()) {
|
||||
if (tpl_cell->type == ID($input_port))
|
||||
continue;
|
||||
RTLIL::Cell *new_cell = module->addCell(map_name(cell, tpl_cell, separator), tpl_cell);
|
||||
map_attributes(cell, new_cell, tpl_cell->name);
|
||||
if (new_cell->has_memid()) {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue