From 8582136a459c6ac38c1edcab9ed0e8c563ddfe73 Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Tue, 12 Aug 2025 12:39:36 +0200
Subject: [PATCH 1/2] simplify: fix $initstate segfault

---
 frontends/ast/simplify.cc | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index c25d0183f..b1a615d76 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -3369,13 +3369,14 @@ skip_dynamic_range_lvalue_expansion:;
 				wire->str = stringf("$initstate$%d_wire", myidx);
 				while (wire->simplify(true, 1, -1, false)) { }
 
-				auto cell = std::make_unique<AstNode>(location, AST_CELL, std::make_unique<AstNode>(location, AST_CELLTYPE), std::make_unique<AstNode>(location, AST_ARGUMENT, std::make_unique<AstNode>(location, AST_IDENTIFIER)));
+				auto cell_owned = std::make_unique<AstNode>(location, AST_CELL, std::make_unique<AstNode>(location, AST_CELLTYPE), std::make_unique<AstNode>(location, AST_ARGUMENT, std::make_unique<AstNode>(location, AST_IDENTIFIER)));
+				auto* cell = cell_owned.get();
 				cell->str = stringf("$initstate$%d", myidx);
 				cell->children[0]->str = "$initstate";
 				cell->children[1]->str = "\\Y";
 				cell->children[1]->children[0]->str = wire->str;
 				cell->children[1]->children[0]->id2ast = wire;
-				current_ast_mod->children.push_back(std::move(cell));
+				current_ast_mod->children.push_back(std::move(cell_owned));
 				while (cell->simplify(true, 1, -1, false)) { }
 
 				newNode = std::make_unique<AstNode>(location, AST_IDENTIFIER);

From 6042ae0e8a18b1707a388b21630c1d819ea728d2 Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Tue, 12 Aug 2025 12:59:31 +0200
Subject: [PATCH 2/2] simplify: add smoke test for system function calls

---
 tests/verilog/fcall_smoke.ys | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 tests/verilog/fcall_smoke.ys

diff --git a/tests/verilog/fcall_smoke.ys b/tests/verilog/fcall_smoke.ys
new file mode 100644
index 000000000..a878e76f6
--- /dev/null
+++ b/tests/verilog/fcall_smoke.ys
@@ -0,0 +1,15 @@
+read_verilog -sv <<EOT
+module smoke_initstate (
+	input resetn,
+    input clk,
+    input a
+);
+    always @(posedge clk) begin
+        assert property ($stable(a));
+        assert property ($changed(a));
+        assert property ($rose(a));
+        assert property ($fell(a));
+		assume(resetn == !$initstate);
+	end
+endmodule
+EOT