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techmap +/cmp2lcu.v for decomposing arithmetic compares to $lcu

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Eddie Hung 2020-01-17 10:51:27 -08:00
parent fffe42d4c1
commit 9b63700678
3 changed files with 108 additions and 0 deletions
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24
tests/techmap/cmp2lcu.ys Normal file
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read_verilog <<EOT
module top(input [11:0] a, b, output gtu, gts, ltu, lts, geu, ges, leu, les);
assign gtu = a > b;
assign gts = $signed(a) > $signed(b);
assign ltu = a < b;
assign lts = $signed(a) < $signed(b);
assign geu = a >= b;
assign ges = $signed(a) >= $signed(b);
assign leu = a <= b;
assign les = $signed(a) <= $signed(b);
endmodule
EOT
proc
equiv_opt -assert techmap -map +/cmp2lcu.v -D LUT_WIDTH=6
design -load postopt
select -assert-count 8 t:$lcu
select -assert-none t:$gt t:$ge t:$lt t:$le
design -load preopt
equiv_opt -assert techmap -map +/cmp2lcu.v -D LUT_WIDTH=4
design -load postopt
select -assert-count 8 t:$lcu
select -assert-none t:$gt t:$ge t:$lt t:$le