Improve Igloo2 example

Signed-off-by: Clifford Wolf <clifford@clifford.at>

examples/igloo2/.gitignore

@@ -1,3 +1,3 @@
 /netlist.edn
-/netlist.v
-/work
+/netlist.vm
+/proj

examples/igloo2/example.v

@@ -1,4 +1,4 @@
-module top (
+module example (
 	input  clk,
 	output LED1,
 	output LED2,

examples/igloo2/example.ys

@@ -1,3 +1,3 @@
 read_verilog example.v
-synth_sf2 -top top -edif netlist.edn
-write_verilog netlist.v
+synth_sf2 -top example -edif netlist.edn
+write_verilog netlist.vm

examples/igloo2/libero.tcl

@@ -1,24 +1,38 @@
 # Run with "libero SCRIPT:libero.tcl"
 
+file delete -force proj
+
 new_project \
-    -name top \
-    -location work \
+    -name example \
+    -location proj \
+    -block_mode 1 \
+    -hdl "VERILOG" \
     -family IGLOO2 \
     -die PA4MGL500 \
     -package tq144 \
-    -speed -1 \
-    -hdl VERILOG
+    -speed -1
 
-# import_files -edif "[pwd]/netlist.edn"
+import_files -hdl_source {netlist.vm}
+import_files -sdc {example.sdc}
+import_files -io_pdc {example.io.pdc}
+import_files -fp_pdc {example.fp.pdc}
+set_option -synth 0
 
-import_files -hdl_source "[pwd]/netlist.v"
-set_root top
+organize_tool_files -tool PLACEROUTE \
+    -file {proj/constraint/example.sdc} \
+    -file {proj/constraint/io/example.io.pdc} \
+    -file {proj/constraint/fp/example.fp.pdc} \
+    -input_type constraint
 
-save_project
+organize_tool_files -tool VERIFYTIMING \
+    -file {proj/constraint/example.sdc} \
+    -input_type constraint
 
-puts "**> SYNTHESIZE"
-run_tool -name {SYNTHESIZE}
-puts "<** SYNTHESIZE"
+configure_tool -name PLACEROUTE \
+    -params TDPR:true \
+    -params PDPR:false \
+    -params EFFORT_LEVEL:false \
+    -params REPAIR_MIN_DELAY:false
 
 puts "**> COMPILE"
 run_tool -name {COMPILE}
@@ -28,6 +42,12 @@ puts "**> PLACEROUTE"
 run_tool -name {PLACEROUTE}
 puts "<** PLACEROUTE"
 
+puts "**> VERIFYTIMING"
+run_tool -name {VERIFYTIMING}
+puts "<** VERIFYTIMING"
+
+save_project
+
 # puts "**> export_bitstream"
 # export_bitstream_file -trusted_facility_file 1 -trusted_facility_file_components {FABRIC}
 # puts "<** export_bitstream"

examples/igloo2/runme.sh

@@ -1,5 +1,4 @@
 #!/bin/bash
 set -ex
-rm -rf work
-yosys example.ys
+yosys -p 'synth_sf2 -top example -edif netlist.edn -vlog netlist.vm' example.v
 LM_LICENSE_FILE=1702@`hostname` /opt/microsemi/Libero_SoC_v11.9/Libero/bin/libero SCRIPT:libero.tcl