3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-05-26 03:46:22 +00:00

Migrate build system to CMake

See #5895 for details.

This commit does not include CI or documentation changes.
This commit is contained in:
Catherine 2026-05-12 05:33:04 +00:00
parent 9d0cdb8551
commit 9b087b4aa7
207 changed files with 5202 additions and 2294 deletions

View file

@ -0,0 +1,45 @@
yosys_pass(anlogic_eqn
anlogic_eqn.cc
)
yosys_pass(anlogic_fixcarry
anlogic_fixcarry.cc
)
yosys_pass(synth_anlogic
synth_anlogic.cc
REQUIRES
abc
anlogic_eqn
anlogic_fixcarry
blackbox
check
clean
deminout
dfflegalize
flatten
hierarchy
memory_libmap
memory_map
opt
opt_expr
proc
read_verilog
simplemap
stat
synth
techmap
tribuf
write_edif
write_json
DATA_DIR
anlogic
DATA_FILES
cells_map.v
arith_map.v
cells_sim.v
eagle_bb.v
lutrams.txt
lutrams_map.v
brams.txt
brams_map.v
)

View file

@ -1,13 +0,0 @@
OBJS += techlibs/anlogic/synth_anlogic.o
OBJS += techlibs/anlogic/anlogic_eqn.o
OBJS += techlibs/anlogic/anlogic_fixcarry.o
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/arith_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_sim.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/eagle_bb.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutrams.txt))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutrams_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/brams.txt))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/brams_map.v))