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verilog_location: rename location to Location to avoid conflict with Pass::location

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This commit is contained in:
Emil J. Tywoniak 2025-08-08 16:22:54 +02:00
parent 5195f81257
commit 99ab73424d
8 changed files with 28 additions and 32 deletions
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2
frontends/ast/simplify.cc
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@ -684,7 +684,7 @@ static bool contains_unbased_unsized(const AstNode *node)
// adds a wire to the current module with the given name that matches the
// dimensions of the given wire reference
void add_wire_for_ref(location loc, const RTLIL::Wire *ref, const std::string &str)
void add_wire_for_ref(Location loc, const RTLIL::Wire *ref, const std::string &str)
{
auto left = AstNode::mkconst_int(loc, ref->width - 1 + ref->start_offset, true);
auto right = AstNode::mkconst_int(loc, ref->start_offset, true);