mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00
Code Activity

rpc: new frontend.

Browse source 
A new pass, connect_rpc, allows any HDL frontend that can read/write
JSON from/to stdin/stdout or an unix socket or a named pipe to
participate in elaboration as a first class citizen, such that any
other HDL supported by Yosys directly or indirectly can transparently
instantiate modules handled by this frontend.

Recognizing that many HDL frontends emit Verilog, it allows the RPC
frontend to direct Yosys to process the result of instantiation via
any built-in Yosys frontend. The resulting RTLIL is then hygienically
integrated into the overall design.
This commit is contained in:
whitequark 2019-09-26 03:57:16 +00:00
parent 8f2bdff7b9
commit 99a7f39084
9 changed files with 744 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

1
Makefile
View file

@ -713,6 +713,7 @@ test: $(TARGETS) $(EXTRA_TARGETS)
+cd tests/aiger && bash run-test.sh $(ABCOPT)
+cd tests/arch && bash run-test.sh
+cd tests/ice40 && bash run-test.sh $(SEEDOPT)
+cd tests/rpc && bash run-test.sh
@echo ""
@echo " Passed \"make test\"."
@echo ""