3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-01-21 01:24:44 +00:00

Add -noinitstate

This commit is contained in:
Gus Smith 2025-12-02 13:08:53 -08:00
parent 3c1eaa3ec0
commit 99035360a4

View file

@ -1,4 +1,4 @@
read_rtlil stage_1_init.il
prep -top dut
sim -w -a -scope dut -r stage_1/engine_0/trace0.yw
sim -noinitstate -w -a -scope dut -r stage_1/engine_0/trace0.yw
write_rtlil stage_2_init.il