mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-12 06:00:55 +00:00
Code Activity

Progress in presentation

Browse source
This commit is contained in:
Clifford Wolf 2014-02-20 12:46:29 +01:00
parent 772330608a
commit 98940260e1
10 changed files with 152 additions and 10 deletions
Download patch file Download diff file Expand all files Collapse all files

15
manual/PRESENTATION_ExAdv/select_01.v
View file

@ -1,15 +0,0 @@
module test(clk, s, a, y);
input clk, s;
input [15:0] a;
output [15:0] y;
reg [15:0] b, c;
always @(posedge clk) begin
b <= a;
c <= b;
end
wire [15:0] state_a = (a ^ b) + c;
wire [15:0] state_b = (a ^ b) - c;
assign y = !s ? state_a : state_b;
endmodule