3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-26 18:45:34 +00:00

Docs: tidying

- Use `:file:` role for file names, as well as `:makevar:` and `:program:`.
- Remove deprecated `linux-arm` and `linux-riscv64` oss-cad-suite targets.
- Add link to ABC.
- More (and better) links to code examples.  Formatted `:file:` text with link
  to source on github.
- Includes a few extra todos (mostly picking up inline code blocks and a couple
  intro reminders).
- Fixing a few missing `:yoscrypt:` and `:cmd:ref:` tags.
- Reflowing some paragraphs for spacing/width.
This commit is contained in:
Krystine Sherwin 2024-01-30 13:31:00 +13:00
parent a7e1c6e530
commit 9878e69d6c
No known key found for this signature in database
18 changed files with 348 additions and 255 deletions

View file

@ -28,13 +28,18 @@ Example
.. todo:: describe ``proc`` images
|code_examples/synth_flow|_.
.. |code_examples/synth_flow| replace:: :file:`docs/source/code_examples/synth_flow`
.. _code_examples/synth_flow: https://github.com/YosysHQ/yosys/tree/krys/docs/docs/source/code_examples/synth_flow
.. literalinclude:: /code_examples/synth_flow/proc_01.v
:language: verilog
:caption: ``docs/source/code_examples/synth_flow/proc_01.v``
:caption: :file:`proc_01.v`
.. literalinclude:: /code_examples/synth_flow/proc_01.ys
:language: yoscrypt
:caption: ``docs/source/code_examples/synth_flow/proc_01.ys``
:caption: :file:`proc_01.ys`
.. figure:: /_images/code_examples/synth_flow/proc_01.*
:class: width-helper
@ -44,19 +49,19 @@ Example
.. literalinclude:: /code_examples/synth_flow/proc_02.v
:language: verilog
:caption: ``docs/source/code_examples/synth_flow/proc_02.v``
:caption: :file:`proc_02.v`
.. literalinclude:: /code_examples/synth_flow/proc_02.ys
:language: yoscrypt
:caption: ``docs/source/code_examples/synth_flow/proc_02.ys``
:caption: :file:`proc_02.ys`
.. figure:: /_images/code_examples/synth_flow/proc_03.*
:class: width-helper
.. literalinclude:: /code_examples/synth_flow/proc_03.ys
:language: yoscrypt
:caption: ``docs/source/code_examples/synth_flow/proc_03.ys``
:caption: :file:`proc_03.ys`
.. literalinclude:: /code_examples/synth_flow/proc_03.v
:language: verilog
:caption: ``docs/source/code_examples/synth_flow/proc_03.v``
:caption: :file:`proc_03.v`