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Added RTLIL::SigSpec::to_sigbit_map()
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parent
c83b990458
commit
978a933b6a
3 changed files with 20 additions and 11 deletions
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@ -400,10 +400,7 @@ struct AST_INTERNAL::ProcessGenerator
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case AST_ASSIGN_EQ:
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case AST_ASSIGN_LE:
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{
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map;
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for (int i = 0; i < SIZE(subst_rvalue_to); i++)
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new_subst_rvalue_map[subst_rvalue_from[i]] = subst_rvalue_to[i];
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map = subst_rvalue_from.to_sigbit_map(subst_rvalue_to);
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RTLIL::SigSpec unmapped_lvalue = ast->children[0]->genRTLIL(), lvalue = unmapped_lvalue;
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RTLIL::SigSpec rvalue = ast->children[1]->genWidthRTLIL(lvalue.size(), &new_subst_rvalue_map);
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lvalue.replace(subst_lvalue_from, subst_lvalue_to);
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@ -421,10 +418,7 @@ struct AST_INTERNAL::ProcessGenerator
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case AST_CASE:
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{
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map;
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for (int i = 0; i < SIZE(subst_rvalue_to); i++)
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new_subst_rvalue_map[subst_rvalue_from[i]] = subst_rvalue_to[i];
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map = subst_rvalue_from.to_sigbit_map(subst_rvalue_to);
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RTLIL::SwitchRule *sw = new RTLIL::SwitchRule;
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sw->signal = ast->children[0]->genWidthRTLIL(-1, &new_subst_rvalue_map);
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current_case->switches.push_back(sw);
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@ -478,9 +472,7 @@ struct AST_INTERNAL::ProcessGenerator
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else if (node->type == AST_BLOCK)
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processAst(node);
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else {
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map;
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for (int i = 0; i < SIZE(subst_rvalue_to); i++)
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new_subst_rvalue_map[subst_rvalue_from[i]] = subst_rvalue_to[i];
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std::map<RTLIL::SigBit, RTLIL::SigBit> new_subst_rvalue_map = subst_rvalue_from.to_sigbit_map(subst_rvalue_to);
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current_case->compare.push_back(node->genWidthRTLIL(sw->signal.size(), &new_subst_rvalue_map));
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}
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}
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