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Eddie Hung 2019-08-20 17:51:50 -07:00
parent 8f666ebac1
commit 96f00e9147
1 changed files with 1 additions and 1 deletions
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techlibs/xilinx/abc_map.v
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@ -165,7 +165,7 @@ module RAM64X1D (
\$__ABC_LUTMUX6 spo (.A(\$SPO ), .S({A0, A1, A2, A3, A4, A5}), .Y(SPO)); \$__ABC_LUTMUX6 spo (.A(\$SPO ), .S({A0, A1, A2, A3, A4, A5}), .Y(SPO));
endmodule endmodule
module \$__ABC_RAM128X1D ( module RAM128X1D (
output DPO, SPO, output DPO, SPO,
input D, input D,
input WCLK, input WCLK,