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Simplify

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This commit is contained in:
Eddie Hung 2019-08-15 12:30:46 -07:00
parent 7f10019610
commit 96ee7b9cf7
1 changed files with 2 additions and 4 deletions
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6
passes/pmgen/ice40_dsp.pmg
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@ -92,16 +92,12 @@ match ffFJKG
endmatch endmatch
code sigH sigO clock clock_pol code sigH sigO clock clock_pol
sigO = sigH;
if (ffFJKG) { if (ffFJKG) {
sigH = port(ffFJKG, \Q); sigH = port(ffFJKG, \Q);
for (auto b : sigH) for (auto b : sigH)
if (b.wire->get_bool_attribute(\keep)) if (b.wire->get_bool_attribute(\keep))
reject; reject;
sigO = sigH;
SigBit c = port(ffFJKG, \CLK).as_bit(); SigBit c = port(ffFJKG, \CLK).as_bit();
bool cp = param(ffFJKG, \CLK_POLARITY).as_bool(); bool cp = param(ffFJKG, \CLK_POLARITY).as_bool();
@ -111,6 +107,8 @@ code sigH sigO clock clock_pol
clock = c; clock = c;
clock_pol = cp; clock_pol = cp;
} }
sigO = sigH;
endcode endcode
match addA match addA