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synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB]_WIDTH >= 2

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This commit is contained in:
Eddie Hung 2019-09-19 14:58:06 -07:00
parent 3b9b0fcd06
commit 95db2489bd
1 changed files with 4 additions and 1 deletions
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5
techlibs/xilinx/synth_xilinx.cc
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@ -342,7 +342,10 @@ struct SynthXilinxPass : public ScriptPass
if (check_label("map_dsp"), "(skip if '-nodsp')") { if (check_label("map_dsp"), "(skip if '-nodsp')") {
if (!nodsp || help_mode) { if (!nodsp || help_mode) {
// NB: Xilinx multipliers are signed only // NB: Xilinx multipliers are signed only
run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_A_MAXWIDTH_PARTIAL=18 -D DSP_B_MAXWIDTH=18 -D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18"); run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_A_MAXWIDTH_PARTIAL=18 -D DSP_B_MAXWIDTH=18 "
"-D DSP_B_MINWIDTH=2 " // Blocks Nx1 multipliers
"-D DSP_Y_MINWIDTH=9 " // UG901 suggests small multiplies are those 4x4 and smaller
"-D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18");
run("xilinx_dsp"); run("xilinx_dsp");
run("chtype -set $mul t:$__soft_mul"); run("chtype -set $mul t:$__soft_mul");
} }