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functional backend: make Memory in the C++ simulation library read-only again
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parent
99effb6789
commit
95d28c22a2
2 changed files with 17 additions and 5 deletions
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@ -156,6 +156,14 @@ template<class NodePrinter> struct CxxPrintVisitor : public FunctionalIR::Abstra
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void memory_write(Node, Node mem, Node addr, Node data) override { print("{}.write({}, {})", mem, addr, data); }
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};
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bool equal_def(RTLIL::Const const &a, RTLIL::Const const &b) {
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if(a.size() != b.size()) return false;
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for(int i = 0; i < a.size(); i++)
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if((a[i] == State::S1) != (b[i] == State::S1))
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return false;
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return true;
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}
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struct CxxModule {
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FunctionalIR ir;
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CxxStruct input_struct, output_struct, state_struct;
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@ -193,11 +201,16 @@ struct CxxModule {
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if (sort.is_signal())
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f.print("\tstate.{} = {};\n", state_struct[name], cxx_const(ir.get_initial_state_signal(name)));
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else if (sort.is_memory()) {
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f.print("\t{{\n");
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f.print("\t\tstd::array<Signal<{}>, {}> mem;\n", sort.data_width(), 1<<sort.addr_width());
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const auto &contents = ir.get_initial_state_memory(name);
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f.print("\tstate.{}.fill({});\n", state_struct[name], cxx_const(contents.default_value()));
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f.print("\t\tmem.fill({});\n", cxx_const(contents.default_value()));
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for(auto range : contents)
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for(auto addr = range.base(); addr < range.limit(); addr++)
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f.print("\tstate.{}[{}] = {};\n", state_struct[name], addr, cxx_const(range[addr]));
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if(!equal_def(range[addr], contents.default_value()))
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f.print("\t\tmem[{}] = {};\n", addr, cxx_const(range[addr]));
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f.print("\t\tstate.{} = mem;\n", state_struct[name]);
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f.print("\t}}\n");
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}
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}
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f.print("}}\n\n");
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