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	Only action if there is more than one clock domain
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					 1 changed files with 8 additions and 7 deletions
				
			
		|  | @ -233,15 +233,16 @@ struct ClkPartPass : public Pass { | ||||||
| 						std::get<0>(it.first) ? "" : "!", log_signal(std::get<1>(it.first)), | 						std::get<0>(it.first) ? "" : "!", log_signal(std::get<1>(it.first)), | ||||||
| 						std::get<2>(it.first) ? "" : "!", log_signal(std::get<3>(it.first))); | 						std::get<2>(it.first) ? "" : "!", log_signal(std::get<3>(it.first))); | ||||||
| 
 | 
 | ||||||
| 			for (auto &it : assigned_cells) { | 			if (assigned_cells.size() > 1) | ||||||
| 				RTLIL::Selection sel(false); | 				for (auto &it : assigned_cells) { | ||||||
| 				sel.selected_members[mod->name] = pool<IdString>(it.second.begin(), it.second.end()); | 					RTLIL::Selection sel(false); | ||||||
|  | 					sel.selected_members[mod->name] = pool<IdString>(it.second.begin(), it.second.end()); | ||||||
| 
 | 
 | ||||||
| 				RTLIL::IdString submod = stringf("%s.%s", mod->name.c_str(), NEW_ID.c_str()); | 					RTLIL::IdString submod = stringf("%s.%s", mod->name.c_str(), NEW_ID.c_str()); | ||||||
| 				Pass::call_on_selection(design, sel, stringf("submod -name %s", submod.c_str())); | 					Pass::call_on_selection(design, sel, stringf("submod -name %s", submod.c_str())); | ||||||
| 
 | 
 | ||||||
| 				design->module(submod)->set_bool_attribute(ID(clkpart)); | 					design->module(submod)->set_bool_attribute(ID(clkpart)); | ||||||
| 			} | 				} | ||||||
| 		} | 		} | ||||||
| 	} | 	} | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
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