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kernel: big fat patch to use more ID::*, otherwise ID(*)
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parent
2d86563bb2
commit
956ecd48f7
152 changed files with 4503 additions and 4391 deletions
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@ -112,12 +112,12 @@ struct MaccmapWorker
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RTLIL::Wire *w2 = module->addWire(NEW_ID, width);
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RTLIL::Cell *cell = module->addCell(NEW_ID, ID($fa));
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cell->setParam(ID(WIDTH), width);
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cell->setParam(ID::WIDTH, width);
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cell->setPort(ID::A, in1);
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cell->setPort(ID::B, in2);
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cell->setPort(ID(C), in3);
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cell->setPort(ID::C, in3);
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cell->setPort(ID::Y, w1);
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cell->setPort(ID(X), w2);
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cell->setPort(ID::X, w2);
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out1 = {out_zeros_msb, w1, out_zeros_lsb};
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out2 = {out_zeros_msb, w2, out_zeros_lsb};
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@ -240,15 +240,15 @@ struct MaccmapWorker
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RTLIL::Cell *c = module->addCell(NEW_ID, ID($alu));
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c->setPort(ID::A, summands.front());
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c->setPort(ID::B, summands.back());
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c->setPort(ID(CI), State::S0);
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c->setPort(ID(BI), State::S0);
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c->setPort(ID::CI, State::S0);
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c->setPort(ID::BI, State::S0);
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c->setPort(ID::Y, module->addWire(NEW_ID, width));
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c->setPort(ID(X), module->addWire(NEW_ID, width));
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c->setPort(ID(CO), module->addWire(NEW_ID, width));
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c->setPort(ID::X, module->addWire(NEW_ID, width));
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c->setPort(ID::CO, module->addWire(NEW_ID, width));
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c->fixup_parameters();
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if (!tree_sum_bits.empty()) {
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c->setPort(ID(CI), tree_sum_bits.back());
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c->setPort(ID::CI, tree_sum_bits.back());
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tree_sum_bits.pop_back();
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}
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log_assert(tree_sum_bits.empty());
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