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kernel: big fat patch to use more ID::*, otherwise ID(*)
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parent
2d86563bb2
commit
956ecd48f7
152 changed files with 4503 additions and 4391 deletions
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@ -262,7 +262,7 @@ struct ExtractFaWorker
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pool<SigBit> new_leaves = leaves;
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new_leaves.erase(bit);
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for (auto port : {ID::A, ID::B, ID(C), ID(D)}) {
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for (auto port : {ID::A, ID::B, ID::C, ID::D}) {
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if (!cell->hasPort(port))
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continue;
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auto bit = sigmap(SigBit(cell->getPort(port)));
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@ -395,18 +395,18 @@ struct ExtractFaWorker
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else
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{
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Cell *cell = module->addCell(NEW_ID, ID($fa));
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cell->setParam(ID(WIDTH), 1);
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cell->setParam(ID::WIDTH, 1);
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log(" Created $fa cell %s.\n", log_id(cell));
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cell->setPort(ID::A, f3i.inv_a ? module->NotGate(NEW_ID, A) : A);
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cell->setPort(ID::B, f3i.inv_b ? module->NotGate(NEW_ID, B) : B);
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cell->setPort(ID(C), f3i.inv_c ? module->NotGate(NEW_ID, C) : C);
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cell->setPort(ID::C, f3i.inv_c ? module->NotGate(NEW_ID, C) : C);
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X = module->addWire(NEW_ID);
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Y = module->addWire(NEW_ID);
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cell->setPort(ID(X), X);
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cell->setPort(ID::X, X);
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cell->setPort(ID::Y, Y);
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facache[fakey] = make_tuple(X, Y, cell);
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@ -501,18 +501,18 @@ struct ExtractFaWorker
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else
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{
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Cell *cell = module->addCell(NEW_ID, ID($fa));
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cell->setParam(ID(WIDTH), 1);
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cell->setParam(ID::WIDTH, 1);
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log(" Created $fa cell %s.\n", log_id(cell));
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cell->setPort(ID::A, f2i.inv_a ? module->NotGate(NEW_ID, A) : A);
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cell->setPort(ID::B, f2i.inv_b ? module->NotGate(NEW_ID, B) : B);
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cell->setPort(ID(C), State::S0);
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cell->setPort(ID::C, State::S0);
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X = module->addWire(NEW_ID);
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Y = module->addWire(NEW_ID);
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cell->setPort(ID(X), X);
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cell->setPort(ID::X, X);
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cell->setPort(ID::Y, Y);
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}
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