From 94675a5e0b7b00776244592f424d906a56430389 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Mon, 29 Apr 2024 08:06:01 +0200 Subject: [PATCH] Fix dff simulation model --- techlibs/nanoxplore/cells_sim.v | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/techlibs/nanoxplore/cells_sim.v b/techlibs/nanoxplore/cells_sim.v index 3af9dd539..de3cffcc8 100644 --- a/techlibs/nanoxplore/cells_sim.v +++ b/techlibs/nanoxplore/cells_sim.v @@ -25,14 +25,14 @@ initial begin end wire clock = CK ^ dff_edge; -wire load = (dff_type == 2) ? (dff_load ? L : 1'bx) : dff_type; +wire load = dff_load ? L : 1'b1; wire async_reset = !dff_sync && dff_init && R; wire sync_reset = dff_sync && dff_init && R; always @(posedge clock, posedge async_reset) - if (async_reset) O <= load; - else if (sync_reset) O <= load; - else O <= I; + if (async_reset) O <= dff_type; + else if (sync_reset) O <= dff_type; + else if (load) O <= I; endmodule