mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-27 19:05:52 +00:00
Code Activity

Compute sigP properly

Browse source
This commit is contained in:
Eddie Hung 2019-09-04 16:59:57 -07:00
parent 229e54568e
commit 93d798272d
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
passes/pmgen/xilinx_dsp.pmg
View file

@ -189,7 +189,7 @@ code ffP sigP clock
clock = c;
sigP = port(ffP, \Q);
sigP.replace(port(ffP, \D), port(ffP, \Q));
}
endcode