mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-23 09:05:32 +00:00
Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor
This commit is contained in:
Eddie Hung
commit
921ff0f5e3
8 changed files with 295 additions and 255 deletions
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@ -1514,7 +1514,47 @@ struct AbcPass : public Pass {
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#endif
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#endif
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size_t argidx;
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// get arguments from scratchpad first, then override by command arguments
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std::string lut_arg, luts_arg, g_arg;
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exe_file = design->scratchpad_get_string("abc.exe", exe_file /* inherit default value if not set */);
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script_file = design->scratchpad_get_string("abc.script", script_file);
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liberty_file = design->scratchpad_get_string("abc.liberty", liberty_file);
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constr_file = design->scratchpad_get_string("abc.constr", constr_file);
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if (design->scratchpad.count("abc.D")) {
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delay_target = "-D " + design->scratchpad_get_string("abc.D");
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}
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if (design->scratchpad.count("abc.I")) {
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sop_inputs = "-I " + design->scratchpad_get_string("abc.I");
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}
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if (design->scratchpad.count("abc.P")) {
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sop_products = "-P " + design->scratchpad_get_string("abc.P");
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}
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if (design->scratchpad.count("abc.S")) {
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lutin_shared = "-S " + design->scratchpad_get_string("abc.S");
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}
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lut_arg = design->scratchpad_get_string("abc.lut", lut_arg);
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luts_arg = design->scratchpad_get_string("abc.luts", luts_arg);
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sop_mode = design->scratchpad_get_bool("abc.sop", sop_mode);
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map_mux4 = design->scratchpad_get_bool("abc.mux4", map_mux4);
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map_mux8 = design->scratchpad_get_bool("abc.mux8", map_mux8);
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map_mux16 = design->scratchpad_get_bool("abc.mux16", map_mux16);
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abc_dress = design->scratchpad_get_bool("abc.dress", abc_dress);
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g_arg = design->scratchpad_get_string("abc.g", g_arg);
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fast_mode = design->scratchpad_get_bool("abc.fast", fast_mode);
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dff_mode = design->scratchpad_get_bool("abc.dff", dff_mode);
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if (design->scratchpad.count("abc.clk")) {
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clk_str = design->scratchpad_get_string("abc.clk");
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dff_mode = true;
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}
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keepff = design->scratchpad_get_bool("abc.keepff", keepff);
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cleanup = !design->scratchpad_get_bool("abc.nocleanup", !cleanup);
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keepff = design->scratchpad_get_bool("abc.keepff", keepff);
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show_tempdir = design->scratchpad_get_bool("abc.showtmp", show_tempdir);
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markgroups = design->scratchpad_get_bool("abc.markgroups", markgroups);
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size_t argidx, g_argidx;
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bool g_arg_from_cmd = false;
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char pwd [PATH_MAX];
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if (!getcwd(pwd, sizeof(pwd))) {
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log_cmd_error("getcwd failed: %s\n", strerror(errno));
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@ -1528,23 +1568,14 @@ struct AbcPass : public Pass {
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}
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if (arg == "-script" && argidx+1 < args.size()) {
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script_file = args[++argidx];
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rewrite_filename(script_file);
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if (!script_file.empty() && !is_absolute_path(script_file) && script_file[0] != '+')
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script_file = std::string(pwd) + "/" + script_file;
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continue;
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}
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if (arg == "-liberty" && argidx+1 < args.size()) {
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liberty_file = args[++argidx];
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rewrite_filename(liberty_file);
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if (!liberty_file.empty() && !is_absolute_path(liberty_file))
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liberty_file = std::string(pwd) + "/" + liberty_file;
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continue;
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}
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if (arg == "-constr" && argidx+1 < args.size()) {
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rewrite_filename(constr_file);
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constr_file = args[++argidx];
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if (!constr_file.empty() && !is_absolute_path(constr_file))
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constr_file = std::string(pwd) + "/" + constr_file;
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continue;
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}
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if (arg == "-D" && argidx+1 < args.size()) {
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@ -1564,37 +1595,11 @@ struct AbcPass : public Pass {
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continue;
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}
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if (arg == "-lut" && argidx+1 < args.size()) {
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string arg = args[++argidx];
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size_t pos = arg.find_first_of(':');
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int lut_mode = 0, lut_mode2 = 0;
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if (pos != string::npos) {
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lut_mode = atoi(arg.substr(0, pos).c_str());
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lut_mode2 = atoi(arg.substr(pos+1).c_str());
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} else {
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lut_mode = atoi(arg.c_str());
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lut_mode2 = lut_mode;
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}
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lut_costs.clear();
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for (int i = 0; i < lut_mode; i++)
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lut_costs.push_back(1);
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for (int i = lut_mode; i < lut_mode2; i++)
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lut_costs.push_back(2 << (i - lut_mode));
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lut_arg = args[++argidx];
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continue;
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}
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if (arg == "-luts" && argidx+1 < args.size()) {
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lut_costs.clear();
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for (auto &tok : split_tokens(args[++argidx], ",")) {
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auto parts = split_tokens(tok, ":");
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if (GetSize(parts) == 0 && !lut_costs.empty())
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lut_costs.push_back(lut_costs.back());
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else if (GetSize(parts) == 1)
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lut_costs.push_back(atoi(parts.at(0).c_str()));
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else if (GetSize(parts) == 2)
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while (GetSize(lut_costs) < std::atoi(parts.at(0).c_str()))
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lut_costs.push_back(atoi(parts.at(1).c_str()));
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else
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log_cmd_error("Invalid -luts syntax.\n");
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}
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luts_arg = args[++argidx];
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continue;
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}
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if (arg == "-sop") {
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@ -1618,123 +1623,9 @@ struct AbcPass : public Pass {
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continue;
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}
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if (arg == "-g" && argidx+1 < args.size()) {
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for (auto g : split_tokens(args[++argidx], ",")) {
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vector<string> gate_list;
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bool remove_gates = false;
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if (GetSize(g) > 0 && g[0] == '-') {
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remove_gates = true;
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g = g.substr(1);
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}
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if (g == "AND") goto ok_gate;
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if (g == "NAND") goto ok_gate;
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if (g == "OR") goto ok_gate;
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if (g == "NOR") goto ok_gate;
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if (g == "XOR") goto ok_gate;
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if (g == "XNOR") goto ok_gate;
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if (g == "ANDNOT") goto ok_gate;
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if (g == "ORNOT") goto ok_gate;
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if (g == "MUX") goto ok_gate;
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if (g == "NMUX") goto ok_gate;
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if (g == "AOI3") goto ok_gate;
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if (g == "OAI3") goto ok_gate;
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if (g == "AOI4") goto ok_gate;
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if (g == "OAI4") goto ok_gate;
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if (g == "simple") {
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gate_list.push_back("AND");
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gate_list.push_back("OR");
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gate_list.push_back("XOR");
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gate_list.push_back("MUX");
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goto ok_alias;
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}
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if (g == "cmos2") {
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if (!remove_gates)
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cmos_cost = true;
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gate_list.push_back("NAND");
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gate_list.push_back("NOR");
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goto ok_alias;
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}
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if (g == "cmos3") {
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if (!remove_gates)
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cmos_cost = true;
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gate_list.push_back("NAND");
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gate_list.push_back("NOR");
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gate_list.push_back("AOI3");
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gate_list.push_back("OAI3");
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goto ok_alias;
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}
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if (g == "cmos4") {
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if (!remove_gates)
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cmos_cost = true;
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gate_list.push_back("NAND");
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gate_list.push_back("NOR");
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gate_list.push_back("AOI3");
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gate_list.push_back("OAI3");
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gate_list.push_back("AOI4");
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gate_list.push_back("OAI4");
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goto ok_alias;
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}
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if (g == "cmos") {
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if (!remove_gates)
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cmos_cost = true;
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gate_list.push_back("NAND");
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gate_list.push_back("NOR");
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gate_list.push_back("AOI3");
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gate_list.push_back("OAI3");
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gate_list.push_back("AOI4");
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gate_list.push_back("OAI4");
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gate_list.push_back("NMUX");
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gate_list.push_back("MUX");
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gate_list.push_back("XOR");
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gate_list.push_back("XNOR");
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goto ok_alias;
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}
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if (g == "gates") {
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gate_list.push_back("AND");
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gate_list.push_back("NAND");
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gate_list.push_back("OR");
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gate_list.push_back("NOR");
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gate_list.push_back("XOR");
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gate_list.push_back("XNOR");
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gate_list.push_back("ANDNOT");
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gate_list.push_back("ORNOT");
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goto ok_alias;
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}
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if (g == "aig") {
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gate_list.push_back("AND");
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gate_list.push_back("NAND");
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gate_list.push_back("OR");
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gate_list.push_back("NOR");
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gate_list.push_back("ANDNOT");
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gate_list.push_back("ORNOT");
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goto ok_alias;
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}
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if (g == "all") {
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gate_list.push_back("AND");
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gate_list.push_back("NAND");
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gate_list.push_back("OR");
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gate_list.push_back("NOR");
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gate_list.push_back("XOR");
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gate_list.push_back("XNOR");
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gate_list.push_back("ANDNOT");
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gate_list.push_back("ORNOT");
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gate_list.push_back("AOI3");
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gate_list.push_back("OAI3");
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gate_list.push_back("AOI4");
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gate_list.push_back("OAI4");
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gate_list.push_back("MUX");
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gate_list.push_back("NMUX");
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}
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cmd_error(args, argidx, stringf("Unsupported gate type: %s", g.c_str()));
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ok_gate:
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gate_list.push_back(g);
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ok_alias:
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for (auto gate : gate_list) {
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if (remove_gates)
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enabled_gates.erase(gate);
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else
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enabled_gates.insert(gate);
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}
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}
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g_arg = args[++argidx];
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g_argidx = argidx;
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g_arg_from_cmd = true;
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continue;
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}
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if (arg == "-fast") {
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@ -1770,6 +1661,174 @@ struct AbcPass : public Pass {
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}
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extra_args(args, argidx, design);
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rewrite_filename(script_file);
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if (!script_file.empty() && !is_absolute_path(script_file) && script_file[0] != '+')
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script_file = std::string(pwd) + "/" + script_file;
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rewrite_filename(liberty_file);
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if (!liberty_file.empty() && !is_absolute_path(liberty_file))
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liberty_file = std::string(pwd) + "/" + liberty_file;
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rewrite_filename(constr_file);
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if (!constr_file.empty() && !is_absolute_path(constr_file))
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constr_file = std::string(pwd) + "/" + constr_file;
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// handle -lut argument
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if (!lut_arg.empty()) {
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size_t pos = lut_arg.find_first_of(':');
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int lut_mode = 0, lut_mode2 = 0;
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if (pos != string::npos) {
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lut_mode = atoi(lut_arg.substr(0, pos).c_str());
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lut_mode2 = atoi(lut_arg.substr(pos+1).c_str());
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} else {
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lut_mode = atoi(lut_arg.c_str());
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lut_mode2 = lut_mode;
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}
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lut_costs.clear();
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for (int i = 0; i < lut_mode; i++)
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lut_costs.push_back(1);
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for (int i = lut_mode; i < lut_mode2; i++)
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lut_costs.push_back(2 << (i - lut_mode));
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}
|
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//handle -luts argument
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if (!luts_arg.empty()){
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lut_costs.clear();
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for (auto &tok : split_tokens(luts_arg, ",")) {
|
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auto parts = split_tokens(tok, ":");
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if (GetSize(parts) == 0 && !lut_costs.empty())
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lut_costs.push_back(lut_costs.back());
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else if (GetSize(parts) == 1)
|
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lut_costs.push_back(atoi(parts.at(0).c_str()));
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else if (GetSize(parts) == 2)
|
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while (GetSize(lut_costs) < std::atoi(parts.at(0).c_str()))
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lut_costs.push_back(atoi(parts.at(1).c_str()));
|
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else
|
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log_cmd_error("Invalid -luts syntax.\n");
|
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}
|
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}
|
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|
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// handle -g argument
|
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if (!g_arg.empty()){
|
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for (auto g : split_tokens(g_arg, ",")) {
|
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vector<string> gate_list;
|
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bool remove_gates = false;
|
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if (GetSize(g) > 0 && g[0] == '-') {
|
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remove_gates = true;
|
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g = g.substr(1);
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}
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if (g == "AND") goto ok_gate;
|
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if (g == "NAND") goto ok_gate;
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if (g == "OR") goto ok_gate;
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if (g == "NOR") goto ok_gate;
|
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if (g == "XOR") goto ok_gate;
|
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if (g == "XNOR") goto ok_gate;
|
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if (g == "ANDNOT") goto ok_gate;
|
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if (g == "ORNOT") goto ok_gate;
|
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if (g == "MUX") goto ok_gate;
|
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if (g == "NMUX") goto ok_gate;
|
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if (g == "AOI3") goto ok_gate;
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if (g == "OAI3") goto ok_gate;
|
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if (g == "AOI4") goto ok_gate;
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if (g == "OAI4") goto ok_gate;
|
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if (g == "simple") {
|
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gate_list.push_back("AND");
|
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gate_list.push_back("OR");
|
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gate_list.push_back("XOR");
|
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gate_list.push_back("MUX");
|
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goto ok_alias;
|
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}
|
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if (g == "cmos2") {
|
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if (!remove_gates)
|
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cmos_cost = true;
|
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gate_list.push_back("NAND");
|
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gate_list.push_back("NOR");
|
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goto ok_alias;
|
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}
|
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if (g == "cmos3") {
|
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if (!remove_gates)
|
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cmos_cost = true;
|
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gate_list.push_back("NAND");
|
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gate_list.push_back("NOR");
|
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gate_list.push_back("AOI3");
|
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gate_list.push_back("OAI3");
|
||||
goto ok_alias;
|
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}
|
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if (g == "cmos4") {
|
||||
if (!remove_gates)
|
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cmos_cost = true;
|
||||
gate_list.push_back("NAND");
|
||||
gate_list.push_back("NOR");
|
||||
gate_list.push_back("AOI3");
|
||||
gate_list.push_back("OAI3");
|
||||
gate_list.push_back("AOI4");
|
||||
gate_list.push_back("OAI4");
|
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goto ok_alias;
|
||||
}
|
||||
if (g == "cmos") {
|
||||
if (!remove_gates)
|
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cmos_cost = true;
|
||||
gate_list.push_back("NAND");
|
||||
gate_list.push_back("NOR");
|
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gate_list.push_back("AOI3");
|
||||
gate_list.push_back("OAI3");
|
||||
gate_list.push_back("AOI4");
|
||||
gate_list.push_back("OAI4");
|
||||
gate_list.push_back("NMUX");
|
||||
gate_list.push_back("MUX");
|
||||
gate_list.push_back("XOR");
|
||||
gate_list.push_back("XNOR");
|
||||
goto ok_alias;
|
||||
}
|
||||
if (g == "gates") {
|
||||
gate_list.push_back("AND");
|
||||
gate_list.push_back("NAND");
|
||||
gate_list.push_back("OR");
|
||||
gate_list.push_back("NOR");
|
||||
gate_list.push_back("XOR");
|
||||
gate_list.push_back("XNOR");
|
||||
gate_list.push_back("ANDNOT");
|
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gate_list.push_back("ORNOT");
|
||||
goto ok_alias;
|
||||
}
|
||||
if (g == "aig") {
|
||||
gate_list.push_back("AND");
|
||||
gate_list.push_back("NAND");
|
||||
gate_list.push_back("OR");
|
||||
gate_list.push_back("NOR");
|
||||
gate_list.push_back("ANDNOT");
|
||||
gate_list.push_back("ORNOT");
|
||||
goto ok_alias;
|
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}
|
||||
if (g == "all") {
|
||||
gate_list.push_back("AND");
|
||||
gate_list.push_back("NAND");
|
||||
gate_list.push_back("OR");
|
||||
gate_list.push_back("NOR");
|
||||
gate_list.push_back("XOR");
|
||||
gate_list.push_back("XNOR");
|
||||
gate_list.push_back("ANDNOT");
|
||||
gate_list.push_back("ORNOT");
|
||||
gate_list.push_back("AOI3");
|
||||
gate_list.push_back("OAI3");
|
||||
gate_list.push_back("AOI4");
|
||||
gate_list.push_back("OAI4");
|
||||
gate_list.push_back("MUX");
|
||||
gate_list.push_back("NMUX");
|
||||
}
|
||||
if (g_arg_from_cmd)
|
||||
cmd_error(args, g_argidx, stringf("Unsupported gate type: %s", g.c_str()));
|
||||
else
|
||||
log_cmd_error("Unsupported gate type: %s", g.c_str());
|
||||
ok_gate:
|
||||
gate_list.push_back(g);
|
||||
ok_alias:
|
||||
for (auto gate : gate_list) {
|
||||
if (remove_gates)
|
||||
enabled_gates.erase(gate);
|
||||
else
|
||||
enabled_gates.insert(gate);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (!lut_costs.empty() && !liberty_file.empty())
|
||||
log_cmd_error("Got -lut and -liberty! These two options are exclusive.\n");
|
||||
if (!constr_file.empty() && liberty_file.empty())
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ struct Abc9Pass : public ScriptPass
|
|||
log(" abc9 [options] [selection]\n");
|
||||
log("\n");
|
||||
log("This pass uses the ABC tool [1] for technology mapping of yosys's internal gate\n");
|
||||
log("library to a target architecture.\n");
|
||||
log("library to a target architecture. Only fully-selected modules are supported.\n");
|
||||
log("\n");
|
||||
log(" -exe <command>\n");
|
||||
#ifdef ABCEXTERNAL
|
||||
|
|
@ -113,11 +113,6 @@ struct Abc9Pass : public ScriptPass
|
|||
log(" print the temp dir name in log. usually this is suppressed so that the\n");
|
||||
log(" command output is identical across runs.\n");
|
||||
log("\n");
|
||||
log(" -markgroups\n");
|
||||
log(" set a 'abcgroup' attribute on all objects created by ABC. The value of\n");
|
||||
log(" this attribute is a unique integer for each ABC process started. This\n");
|
||||
log(" is useful for debugging the partitioning of clock domains.\n");
|
||||
log("\n");
|
||||
log(" -box <file>\n");
|
||||
log(" pass this file with box library to ABC. Use with -lut.\n");
|
||||
log("\n");
|
||||
|
|
@ -150,6 +145,25 @@ struct Abc9Pass : public ScriptPass
|
|||
std::string run_from, run_to;
|
||||
clear_flags();
|
||||
|
||||
// get arguments from scratchpad first, then override by command arguments
|
||||
std::string lut_arg, luts_arg;
|
||||
exe_file = design->scratchpad_get_string("abc9.exe", exe_file /* inherit default value if not set */);
|
||||
script_file = design->scratchpad_get_string("abc9.script", script_file);
|
||||
if (design->scratchpad.count("abc9.D")) {
|
||||
delay_target = "-D " + design->scratchpad_get_string("abc9.D");
|
||||
}
|
||||
lut_arg = design->scratchpad_get_string("abc9.lut", lut_arg);
|
||||
luts_arg = design->scratchpad_get_string("abc9.luts", luts_arg);
|
||||
fast_mode = design->scratchpad_get_bool("abc9.fast", fast_mode);
|
||||
dff_mode = design->scratchpad_get_bool("abc9.dff", dff_mode);
|
||||
cleanup = !design->scratchpad_get_bool("abc9.nocleanup", !cleanup);
|
||||
show_tempdir = design->scratchpad_get_bool("abc9.showtmp", show_tempdir);
|
||||
box_file = design->scratchpad_get_string("abc9.box", box_file);
|
||||
if (design->scratchpad.count("abc9.W")) {
|
||||
wire_delay = "-W " + design->scratchpad_get_string("abc9.W");
|
||||
}
|
||||
nomfs = design->scratchpad_get_bool("abc9.nomfs", nomfs);
|
||||
|
||||
size_t argidx;
|
||||
for (argidx = 1; argidx < args.size(); argidx++) {
|
||||
std::string arg = args[argidx];
|
||||
|
|
@ -161,7 +175,7 @@ struct Abc9Pass : public ScriptPass
|
|||
continue;
|
||||
}
|
||||
if (arg == "-fast" || /* arg == "-dff" || */
|
||||
/* arg == "-nocleanup" || */ arg == "-showtmp" || arg == "-markgroups" ||
|
||||
/* arg == "-nocleanup" || */ arg == "-showtmp" ||
|
||||
arg == "-nomfs") {
|
||||
map_cmd << " " << arg;
|
||||
continue;
|
||||
|
|
@ -210,6 +224,10 @@ struct Abc9Pass : public ScriptPass
|
|||
log("Skipping module %s as it contains processes.\n", log_id(mod));
|
||||
continue;
|
||||
}
|
||||
log_assert(!module->attributes.count(ID(abc9_box_id)));
|
||||
|
||||
if (!design->selected_whole_module(module))
|
||||
log_error("Can't handle partially selected module %s!\n", log_id(module));
|
||||
|
||||
active_design->selection().select(mod);
|
||||
|
||||
|
|
|
|||
|
|
@ -63,7 +63,6 @@ extern "C" int Abc_RealMain(int argc, char *argv[]);
|
|||
USING_YOSYS_NAMESPACE
|
||||
PRIVATE_NAMESPACE_BEGIN
|
||||
|
||||
bool markgroups;
|
||||
int map_autoidx;
|
||||
|
||||
inline std::string remap_name(RTLIL::IdString abc9_name)
|
||||
|
|
@ -349,11 +348,8 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip
|
|||
if (mapped_mod == NULL)
|
||||
log_error("ABC output file does not contain a module `$__abc9__'.\n");
|
||||
|
||||
for (auto &it : mapped_mod->wires_) {
|
||||
RTLIL::Wire *w = it.second;
|
||||
RTLIL::Wire *remap_wire = module->addWire(remap_name(w->name), GetSize(w));
|
||||
if (markgroups) remap_wire->attributes[ID(abcgroup)] = map_autoidx;
|
||||
}
|
||||
for (auto wire : mapped_mod->wires())
|
||||
module->addWire(remap_name(w->name), GetSize(w));
|
||||
|
||||
for (auto it = module->cells_.begin(); it != module->cells_.end(); )
|
||||
if (it->second->type.in(ID($_AND_), ID($_NOT_), ID($__ABC9_FF_)))
|
||||
|
|
@ -416,7 +412,6 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip
|
|||
}
|
||||
else
|
||||
log_abort();
|
||||
if (cell && markgroups) cell->attributes[ID(abcgroup)] = map_autoidx;
|
||||
continue;
|
||||
}
|
||||
cell_stats[mapped_cell->type]++;
|
||||
|
|
@ -429,7 +424,6 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip
|
|||
SigSpec my_a = module->wires_.at(remap_name(mapped_cell->getPort(ID::A).as_wire()->name));
|
||||
SigSpec my_y = module->wires_.at(remap_name(mapped_cell->getPort(ID::Y).as_wire()->name));
|
||||
module->connect(my_y, my_a);
|
||||
if (markgroups) mapped_cell->attributes[ID(abcgroup)] = map_autoidx;
|
||||
log_abort();
|
||||
continue;
|
||||
}
|
||||
|
|
@ -441,7 +435,6 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip
|
|||
cell = module->addCell(remap_name(mapped_cell->name), mapped_cell->type);
|
||||
}
|
||||
|
||||
if (markgroups) cell->attributes[ID(abcgroup)] = map_autoidx;
|
||||
if (existing_cell) {
|
||||
cell->parameters = existing_cell->parameters;
|
||||
cell->attributes = existing_cell->attributes;
|
||||
|
|
@ -660,8 +653,6 @@ struct Abc9MapPass : public Pass {
|
|||
log(" set delay target. the string {D} in the default scripts above is\n");
|
||||
log(" replaced by this option when used, and an empty string otherwise\n");
|
||||
log(" (indicating best possible delay).\n");
|
||||
// log(" This also replaces 'dretime' with 'dretime; retime -o {D}' in the\n");
|
||||
// log(" default scripts above.\n");
|
||||
log("\n");
|
||||
// log(" -S <num>\n");
|
||||
// log(" maximum number of LUT inputs shared.\n");
|
||||
|
|
@ -683,28 +674,14 @@ struct Abc9MapPass : public Pass {
|
|||
log(" generate netlist using luts. Use the specified costs for luts with 1,\n");
|
||||
log(" 2, 3, .. inputs.\n");
|
||||
log("\n");
|
||||
// log(" -dff\n");
|
||||
// log(" also pass $_DFF_?_ and $_DFFE_??_ cells through ABC. modules with many\n");
|
||||
// log(" clock domains are automatically partitioned in clock domains and each\n");
|
||||
// log(" domain is passed through ABC independently.\n");
|
||||
// log("\n");
|
||||
// log(" -clk [!]<clock-signal-name>[,[!]<enable-signal-name>]\n");
|
||||
// log(" use only the specified clock domain. this is like -dff, but only FF\n");
|
||||
// log(" cells that belong to the specified clock domain are used.\n");
|
||||
// log("\n");
|
||||
// log(" -keepff\n");
|
||||
// log(" set the \"keep\" attribute on flip-flop output wires. (and thus preserve\n");
|
||||
// log(" them, for example for equivalence checking.)\n");
|
||||
// log("\n");
|
||||
log(" -dff\n");
|
||||
log(" also pass $_ABC9_FF_ cells through to ABC. modules with many clock\n");
|
||||
log(" domains are marked as such and automatically partitioned by ABC.\n");
|
||||
log("\n");
|
||||
log(" -showtmp\n");
|
||||
log(" print the temp dir name in log. usually this is suppressed so that the\n");
|
||||
log(" command output is identical across runs.\n");
|
||||
log("\n");
|
||||
log(" -markgroups\n");
|
||||
log(" set a 'abcgroup' attribute on all objects created by ABC. The value of\n");
|
||||
log(" this attribute is a unique integer for each ABC process started. This\n");
|
||||
log(" is useful for debugging the partitioning of clock domains.\n");
|
||||
log("\n");
|
||||
log(" -box <file>\n");
|
||||
log(" pass this file with box library to ABC. Use with -lut.\n");
|
||||
log("\n");
|
||||
|
|
@ -737,7 +714,6 @@ struct Abc9MapPass : public Pass {
|
|||
bool show_tempdir = false;
|
||||
bool nomfs = false;
|
||||
vector<int> lut_costs;
|
||||
markgroups = false;
|
||||
|
||||
#if 0
|
||||
cleanup = false;
|
||||
|
|
@ -828,10 +804,6 @@ struct Abc9MapPass : public Pass {
|
|||
show_tempdir = true;
|
||||
continue;
|
||||
}
|
||||
if (arg == "-markgroups") {
|
||||
markgroups = true;
|
||||
continue;
|
||||
}
|
||||
if (arg == "-box" && argidx+1 < args.size()) {
|
||||
box_file = args[++argidx];
|
||||
continue;
|
||||
|
|
@ -871,6 +843,9 @@ struct Abc9MapPass : public Pass {
|
|||
continue;
|
||||
}
|
||||
|
||||
if (!design->selected_whole_module(mod))
|
||||
log_error("Can't handle partially selected module %s!\n", log_id(module));
|
||||
|
||||
abc9_module(design, mod, script_file, exe_file, lut_costs,
|
||||
delay_target, lutin_shared, fast_mode, show_tempdir,
|
||||
box_file, lut_file, wire_delay, nomfs, tempdir_name);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue