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Use nonblocking

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This commit is contained in:
Eddie Hung 2019-04-23 13:42:06 -07:00
parent 4df4a97ffa
commit 91c3afcab7
1 changed files with 1 additions and 1 deletions
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2
techlibs/ice40/cells_sim.v
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@ -149,7 +149,7 @@ module SB_DFF ((* abc_flop_q *) output `SB_DFF_REG, input C, (* abc_flop_d *) in
always @(posedge C) always @(posedge C)
Q <= D; Q <= D;
`else `else
always @* Q = D; always @* Q <= D;
`endif `endif
endmodule endmodule