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	Ensure \A_SIGNED is never used with $shiftx
It has no effect on the output ($shiftx doesn't perform any sign extension whatsoever), so an attempt to use it should be caught early.
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					 2 changed files with 9 additions and 1 deletions
				
			
		|  | @ -1035,7 +1035,11 @@ namespace { | ||||||
| 			} | 			} | ||||||
| 
 | 
 | ||||||
| 			if (cell->type.in(ID($shift), ID($shiftx))) { | 			if (cell->type.in(ID($shift), ID($shiftx))) { | ||||||
| 				param_bool(ID::A_SIGNED); | 				if (cell->type == ID($shiftx)) { | ||||||
|  | 					param_bool(ID::A_SIGNED, /*expected=*/false); | ||||||
|  | 				} else { | ||||||
|  | 					param_bool(ID::A_SIGNED); | ||||||
|  | 				} | ||||||
| 				param_bool(ID::B_SIGNED); | 				param_bool(ID::B_SIGNED); | ||||||
| 				port(ID::A, param(ID::A_WIDTH)); | 				port(ID::A, param(ID::A_WIDTH)); | ||||||
| 				port(ID::B, param(ID::B_WIDTH)); | 				port(ID::B, param(ID::B_WIDTH)); | ||||||
|  |  | ||||||
|  | @ -264,6 +264,10 @@ static void create_gold_module(RTLIL::Design *design, RTLIL::IdString cell_type, | ||||||
| 		cell->setPort(ID::Y, wire); | 		cell->setPort(ID::Y, wire); | ||||||
| 	} | 	} | ||||||
| 
 | 
 | ||||||
|  | 	if (cell_type.in(ID($shiftx))) { | ||||||
|  | 		cell->parameters[ID::A_SIGNED] = false; | ||||||
|  | 	} | ||||||
|  | 
 | ||||||
| 	if (cell_type.in(ID($shl), ID($shr), ID($sshl), ID($sshr))) { | 	if (cell_type.in(ID($shl), ID($shr), ID($sshl), ID($sshr))) { | ||||||
| 		cell->parameters[ID::B_SIGNED] = false; | 		cell->parameters[ID::B_SIGNED] = false; | ||||||
| 	} | 	} | ||||||
|  |  | ||||||
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