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coolrunner2: Add extraction for TFFs

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This commit is contained in:
Robert Ou 2018-03-31 02:54:26 -07:00
parent dd5fab69c1
commit 8fe9cdf364
3 changed files with 54 additions and 0 deletions
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1
techlibs/coolrunner2/Makefile.inc
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@ -4,4 +4,5 @@ OBJS += techlibs/coolrunner2/coolrunner2_sop.o
$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/cells_latch.v)) $(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/cells_latch.v))
$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/cells_sim.v)) $(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/cells_sim.v))
$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/tff_extract.v))
$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/xc2_dff.lib)) $(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/xc2_dff.lib))

12
techlibs/coolrunner2/synth_coolrunner2.cc
View file

@ -149,6 +149,16 @@ struct SynthCoolrunner2Pass : public ScriptPass
run("dfflibmap -prepare -liberty +/coolrunner2/xc2_dff.lib"); run("dfflibmap -prepare -liberty +/coolrunner2/xc2_dff.lib");
} }
if (check_label("map_tff"))
{
// This is quite hacky. By telling abc that it can only use AND and XOR gates, abc will try and use XOR
// gates "whenever possible." This will hopefully cause toggle flip-flop structures to turn into an XOR
// connected to a D flip-flop. We then match on these and convert them into XC2 TFF cells.
run("abc -g AND,XOR");
run("clean");
run("extract -map +/coolrunner2/tff_extract.v");
}
if (check_label("map_pla")) if (check_label("map_pla"))
{ {
run("abc -sop -I 40 -P 56"); run("abc -sop -I 40 -P 56");
@ -160,6 +170,8 @@ struct SynthCoolrunner2Pass : public ScriptPass
run("dfflibmap -liberty +/coolrunner2/xc2_dff.lib"); run("dfflibmap -liberty +/coolrunner2/xc2_dff.lib");
run("dffinit -ff FDCP Q INIT"); run("dffinit -ff FDCP Q INIT");
run("dffinit -ff FDCP_N Q INIT"); run("dffinit -ff FDCP_N Q INIT");
run("dffinit -ff FTCP Q INIT");
run("dffinit -ff FTCP_N Q INIT");
run("dffinit -ff LDCP Q INIT"); run("dffinit -ff LDCP Q INIT");
run("dffinit -ff LDCP_N Q INIT"); run("dffinit -ff LDCP_N Q INIT");
run("coolrunner2_sop"); run("coolrunner2_sop");

41
techlibs/coolrunner2/tff_extract.v Normal file
View file

@ -0,0 +1,41 @@
module FTCP (C, PRE, CLR, T, Q);
input C, PRE, CLR, T;
output wire Q;
wire xorout;
$_XOR_ xorgate (
.A(T),
.B(Q),
.Y(xorout),
);
$_DFFSR_PPP_ dff (
.C(C),
.D(xorout),
.Q(Q),
.S(PRE),
.R(CLR),
);
endmodule
module FTCP_N (C, PRE, CLR, T, Q);
input C, PRE, CLR, T;
output wire Q;
wire xorout;
$_XOR_ xorgate (
.A(T),
.B(Q),
.Y(xorout),
);
$_DFFSR_NPP_ dff (
.C(C),
.D(xorout),
.Q(Q),
.S(PRE),
.R(CLR),
);
endmodule