mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-30 19:22:31 +00:00
Code Activity

Add abc_box_id attribute to MUXF7/F8 cells

Browse source
This commit is contained in:
Eddie Hung 2019-04-15 22:25:09 -07:00
parent 538592067e
commit 8fbbd9b129
1 changed files with 2 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

2
techlibs/xilinx/cells_sim.v
View file

@ -159,10 +159,12 @@ module MUXCY(output O, input CI, DI, S);
assign O = S ? CI : DI;
endmodule
(* abc_box_id = 1 *)
module MUXF7(output O, input I0, I1, S);
assign O = S ? I1 : I0;
endmodule
(* abc_box_id = 2 *)
module MUXF8(output O, input I0, I1, S);
assign O = S ? I1 : I0;
endmodule