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https://github.com/YosysHQ/yosys
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updated to use get_src_attribute() and set_src_attribute().
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parent
71d43cfc08
commit
8dc6083de7
3 changed files with 7 additions and 10 deletions
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@ -172,7 +172,6 @@ struct TechmapWorker
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std::string orig_cell_name;
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pool<string> extra_src_attrs;
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std::string src = cell->attributes["\\src"].decode_string();
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if (!flatten_mode)
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{
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@ -341,7 +340,7 @@ struct TechmapWorker
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RTLIL::Cell *c = module->addCell(c_name, it.second);
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design->select(module, c);
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if (!src.empty()) c->attributes["\\src"] = src;
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c->set_src_attribute(cell->get_src_attribute());
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if (!flatten_mode && c->type.substr(0, 2) == "\\$")
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c->type = c->type.substr(1);
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@ -467,7 +466,6 @@ struct TechmapWorker
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log_assert(cell == module->cell(cell->name));
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bool mapped_cell = false;
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std::string src = cell->attributes["\\src"].decode_string();
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std::string cell_type = cell->type.str();
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if (in_recursion && cell_type.substr(0, 2) == "\\$")
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@ -517,7 +515,7 @@ struct TechmapWorker
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extmapper_module = extmapper_design->addModule(m_name);
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RTLIL::Cell *extmapper_cell = extmapper_module->addCell(cell->type, cell);
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if (!src.empty()) extmapper_cell->attributes["\\src"] = src;
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extmapper_cell->set_src_attribute(cell->get_src_attribute());
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int port_counter = 1;
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for (auto &c : extmapper_cell->connections_) {
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