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Added module->avail_parameters (for advanced techmap features)
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3 changed files with 14 additions and 3 deletions
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@ -805,7 +805,6 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
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case AST_TASK:
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case AST_FUNCTION:
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case AST_AUTOWIRE:
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case AST_PARAMETER:
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case AST_LOCALPARAM:
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case AST_DEFPARAM:
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case AST_GENVAR:
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@ -814,6 +813,11 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
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case AST_GENIF:
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break;
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// remember the parameter, needed for example in techmap
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case AST_PARAMETER:
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current_module->avail_parameters.insert(str);
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break;
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// create an RTLIL::Wire for an AST_WIRE node
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case AST_WIRE: {
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if (current_module->wires.count(str) != 0)
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