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verific: use MFCU for SV file list
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b6c148f84a
commit
8d504ecb48
1 changed files with 1 additions and 10 deletions
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@ -3747,12 +3747,10 @@ struct VerificPass : public Pass {
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#ifdef VERIFIC_VHDL_SUPPORT
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int i;
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Array *file_names_sv = new Array(POINTER_HASH);
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bool has_vhdl = false;
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FOREACH_ARRAY_ITEM(file_names, i, filename) {
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std::string filename_str = filename;
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if ((filename_str.substr(filename_str.find_last_of(".") + 1) == "vhd") ||
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(filename_str.substr(filename_str.find_last_of(".") + 1) == "vhdl")) {
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has_vhdl = true;
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vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_2019").c_str());
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if (!vhdl_file::Analyze(filename, work.c_str(), vhdl_file::VHDL_2019)) {
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verific_error_msg.clear();
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@ -3762,14 +3760,7 @@ struct VerificPass : public Pass {
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file_names_sv->Insert(strdup(filename));
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}
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}
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if (has_vhdl) {
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FOREACH_ARRAY_ITEM(file_names_sv, i, filename) {
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if (!veri_file::Analyze(filename, analysis_mode, work.c_str())) {
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verific_error_msg.clear();
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log_cmd_error("Reading Verilog/SystemVerilog sources failed.\n");
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}
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}
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} else if (!veri_file::AnalyzeMultipleFiles(file_names_sv, analysis_mode, work.c_str(), veri_file::MFCU)) {
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if (!veri_file::AnalyzeMultipleFiles(file_names_sv, analysis_mode, work.c_str(), veri_file::MFCU)) {
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verific_error_msg.clear();
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log_cmd_error("Reading Verilog/SystemVerilog sources failed.\n");
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}
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