diff --git a/CHANGELOG b/CHANGELOG
index ab1632a09..9402f9bbb 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -16,6 +16,8 @@ Yosys 0.11 .. Yosys 0.12
     - Support parameters using struct as a wiretype
     - Fixed regression preventing the use array querying functions in case
       expressions and case item expressions
+    - Fixed static size casts inadvertently limiting the result width of binary
+      operations
 
  * New commands and options
     - Added "-genlib" option to "abc" pass
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 1fe74bb72..2788a850f 100644
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -932,7 +932,8 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *foun
 		if (children.at(0)->type != AST_CONSTANT)
 			log_file_error(filename, location.first_line, "Static cast with non constant expression!\n");
 		children.at(1)->detectSignWidthWorker(width_hint, sign_hint);
-		width_hint = children.at(0)->bitsAsConst().as_int();
+		this_width = children.at(0)->bitsAsConst().as_int();
+		width_hint = max(width_hint, this_width);
 		if (width_hint <= 0)
 			log_file_error(filename, location.first_line, "Static cast with zero or negative size!\n");
 		break;
diff --git a/tests/simple/lesser_size_cast.sv b/tests/simple/lesser_size_cast.sv
new file mode 100644
index 000000000..8c0bc9814
--- /dev/null
+++ b/tests/simple/lesser_size_cast.sv
@@ -0,0 +1,7 @@
+module top (
+    input signed [1:0] a,
+    input signed [2:0] b,
+    output signed [4:0] c
+);
+    assign c = 2'(a) * b;
+endmodule