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Merge remote-tracking branch 'origin/master' into iopad_default

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Miodrag Milanovic 2019-12-28 16:23:31 +01:00
commit 8c3de1d4bd
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12
tests/arch/xilinx/mul.ys
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@ -7,3 +7,15 @@ cd top # Constrain all select calls below inside the top module
select -assert-count 1 t:DSP48E1
select -assert-none t:DSP48E1 %% t:* %D
design -reset
read_verilog ../common/mul.v
hierarchy -top top
proc
equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx -family xc6s # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd top # Constrain all select calls below inside the top module
select -assert-count 1 t:DSP48A1
select -assert-none t:DSP48A1 %% t:* %D