mirror of
https://github.com/YosysHQ/yosys
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docs: Shuffling bug reporting guidelines
Move the "creating an issue" section from bugpoint.rst to "reporting bugs" in `contributing.rst`. Fix link to `CONTRIBUTING.md`. Update `CONTRIBUTING.md` to refer to the bugpoint guide instead of the stack overflow guide.
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@ -19,14 +19,14 @@ much easier for someone to respond and help.
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### Bug reports
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### Bug reports
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Before you submit an issue, please have a search of the existing issues in case
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Before you submit an issue, please check out the [how-to guide for
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one already exists. Making sure that you have a minimal, complete and
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`bugpoint`](https://yosys.readthedocs.io/en/latest/using_yosys/bugpoint.html).
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verifiable example (MVCE) is a great way to quickly check an existing issue
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This guide will take you through the process of using the [`bugpoint`
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against a new one. Stack overflow has a guide on [how to create an
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command](https://yosys.readthedocs.io/en/latest/cmd/bugpoint.html) in Yosys to
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MVCE](https://stackoverflow.com/help/minimal-reproducible-example). The
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produce a [minimal, complete and verifiable
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[`bugpoint`
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example](https://stackoverflow.com/help/minimal-reproducible-example) (MVCE).
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command](https://yosyshq.readthedocs.io/projects/yosys/en/latest/cmd/bugpoint.html)
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Providing an MVCE with your bug report drastically increases the likelihood that
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in Yosys can be helpful for this process.
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someone will be able to help resolve your issue.
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# Using pull requests
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# Using pull requests
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@ -491,7 +491,7 @@ Identifying issues
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.. _the existing issues: https://github.com/YosysHQ/yosys/issues
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.. _the existing issues: https://github.com/YosysHQ/yosys/issues
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- if there are no existing or related issues already, then check out the steps
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- if there are no existing or related issues already, then check out the steps
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for :ref:`using_yosys/bugpoint:creating an issue on github`
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for :ref:`yosys_internals/extending_yosys/contributing:reporting bugs`
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Why context matters
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Why context matters
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@ -526,137 +526,3 @@ Why context matters
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bug in ``+/xilinx/cells_map.v``, and carried on
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bug in ``+/xilinx/cells_map.v``, and carried on
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- but by following the failure back you've managed to identify a problem with
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- but by following the failure back you've managed to identify a problem with
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`opt_expr` that could be causing other problems either now or in the future
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`opt_expr` that could be causing other problems either now or in the future
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Creating an issue on GitHub
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---------------------------
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- use the `bug report template`_
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.. _bug report template: https://github.com/YosysHQ/yosys/issues/new?template=bug_report.yml
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- short title briefly describing the issue, e.g.
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techmap of wide mux with undefined inputs raises error during synth_xilinx
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+ tells us what's happening ("raises error")
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+ gives the command affected (`techmap`)
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+ an overview of the input design ("wide mux with undefined inputs")
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+ and some context where it was found ("during `synth_xilinx`")
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Reproduction Steps
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~~~~~~~~~~~~~~~~~~
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- ideally a code-block (starting and ending with triple backquotes) containing
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the minimized design (Verilog or RTLIL), followed by a code-block containing
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the minimized yosys script OR a command line call to yosys with
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code-formatting (starting and ending with single backquotes)
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.. code-block:: markdown
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min.v
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```verilog
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// minimized Verilog design
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```
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min.ys
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```
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read_verilog min.v
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# minimum sequence of commands to reproduce error
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```
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OR
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`yosys -p ': minimum sequence of commands;' min.v`
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- alternatively can provide a single code-block which includes the minimized
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design as a "here document" followed by the sequence of commands which
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reproduce the error
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+ see :doc:`/using_yosys/more_scripting/load_design` for more on heredocs.
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.. code-block:: markdown
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```
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read_rtlil <<EOF
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# minimized RTLIL design
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EOF
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# minimum sequence of commands
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```
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- any environment variables or command line options should also be mentioned
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- if the problem occurs for a range of values/designs, what is that range
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- if you're using an external tool, such as ``valgrind``, to detect the issue,
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what version of that tool are you using and what options are you giving it
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.. warning::
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Please try to avoid the use of any external plugins/tools in the reproduction
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steps if they are not directly related to the issue being raised. This
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includes frontend plugins such as GHDL or slang; use `write_rtlil` on the
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minimized design instead. This also includes tools which provide a wrapper
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around Yosys such as OpenLane; you should instead minimize your input and
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reproduction steps to just the Yosys part.
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"Expected Behaviour"
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~~~~~~~~~~~~~~~~~~~~
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- if you have a similar design/script that doesn't give the error, include it
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here as a reference
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- if the bug is that an error *should* be raised but isn't, are there any other
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commands with similar error messages
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"Actual Behaviour"
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~~~~~~~~~~~~~~~~~~
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- any error messages go here
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- any details relevant to the crash that were found with ``--trace`` or
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``--debug`` flags
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- if you identified the point of failure in the source code, you could mention
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it here, or as a comment below
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+ if possible, use a permalink to the source on GitHub
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+ you can browse the source repository for a certain commit with the failure
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and open the source file, select the relevant lines (click on the line
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number for the first relevant line, then while holding shift click on the
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line number for the last relevant line), click on the ``...`` that appears
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and select "Copy permalink"
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+ should look something like
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``https://github.com/YosysHQ/yosys/blob/<commit_hash>/path/to/file#L139-L147``
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+ clicking on "Preview" should reveal a code block containing the lines of
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source specified, with a link to the source file at the given commit
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Additional details
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~~~~~~~~~~~~~~~~~~
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- once you have created the issue, any additional details can be added as a
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comment on that issue
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- could include any additional context as to what you were doing when you first
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encountered the bug
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- was this issue discovered through the use of a fuzzer
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- if you've minimized the script, consider including the `bugpoint` script you
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used, or the original script, e.g.
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.. code-block:: markdown
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Minimized with
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```
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read_verilog design.v
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# original sequence of commands prior to error
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bugpoint -script <failure.ys> -grep "<string>"
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write_rtlil min.il
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```
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OR
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Minimized from
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`yosys -p ': original sequence of commands to produce error;' design.v`
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- if you're able to, it may also help to share the original un-minimized design
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+ if the design is too big for a comment, consider turning it into a `Gist`_
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.. _Gist: https://gist.github.com/
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@ -7,7 +7,7 @@ Contributing to Yosys
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|CONTRIBUTING|_ file.
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|CONTRIBUTING|_ file.
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.. |CONTRIBUTING| replace:: :file:`CONTRIBUTING.md`
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.. |CONTRIBUTING| replace:: :file:`CONTRIBUTING.md`
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.. _CONTRIBUTING: https://github.com/YosysHQ/yosys/CONTRIBUTING.md
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.. _CONTRIBUTING: https://github.com/YosysHQ/yosys/blob/main/CONTRIBUTING.md
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Coding Style
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Coding Style
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------------
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------------
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@ -42,3 +42,137 @@ for implicit type casts, always use ``GetSize(foobar)`` instead of
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``foobar.size()``. (``GetSize()`` is defined in :file:`kernel/yosys.h`)
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``foobar.size()``. (``GetSize()`` is defined in :file:`kernel/yosys.h`)
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Use range-based for loops whenever applicable.
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Use range-based for loops whenever applicable.
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Reporting bugs
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--------------
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- use the `bug report template`_
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.. _bug report template: https://github.com/YosysHQ/yosys/issues/new?template=bug_report.yml
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- short title briefly describing the issue, e.g.
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techmap of wide mux with undefined inputs raises error during synth_xilinx
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+ tells us what's happening ("raises error")
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+ gives the command affected (`techmap`)
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+ an overview of the input design ("wide mux with undefined inputs")
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+ and some context where it was found ("during `synth_xilinx`")
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Reproduction Steps
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~~~~~~~~~~~~~~~~~~
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- ideally a code-block (starting and ending with triple backquotes) containing
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the minimized design (Verilog or RTLIL), followed by a code-block containing
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the minimized yosys script OR a command line call to yosys with
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code-formatting (starting and ending with single backquotes)
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.. code-block:: markdown
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min.v
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```verilog
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// minimized Verilog design
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```
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min.ys
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```
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read_verilog min.v
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# minimum sequence of commands to reproduce error
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```
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OR
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`yosys -p ': minimum sequence of commands;' min.v`
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- alternatively can provide a single code-block which includes the minimized
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design as a "here document" followed by the sequence of commands which
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reproduce the error
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+ see :doc:`/using_yosys/more_scripting/load_design` for more on heredocs.
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.. code-block:: markdown
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```
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read_rtlil <<EOF
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# minimized RTLIL design
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EOF
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# minimum sequence of commands
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```
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- any environment variables or command line options should also be mentioned
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- if the problem occurs for a range of values/designs, what is that range
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- if you're using an external tool, such as ``valgrind``, to detect the issue,
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what version of that tool are you using and what options are you giving it
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.. warning::
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Please try to avoid the use of any external plugins/tools in the reproduction
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steps if they are not directly related to the issue being raised. This
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includes frontend plugins such as GHDL or slang; use `write_rtlil` on the
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minimized design instead. This also includes tools which provide a wrapper
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around Yosys such as OpenLane; you should instead minimize your input and
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reproduction steps to just the Yosys part.
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"Expected Behaviour"
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~~~~~~~~~~~~~~~~~~~~
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- if you have a similar design/script that doesn't give the error, include it
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here as a reference
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- if the bug is that an error *should* be raised but isn't, are there any other
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commands with similar error messages
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"Actual Behaviour"
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~~~~~~~~~~~~~~~~~~
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- any error messages go here
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- any details relevant to the crash that were found with ``--trace`` or
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``--debug`` flags
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- if you identified the point of failure in the source code, you could mention
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it here, or as a comment below
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+ if possible, use a permalink to the source on GitHub
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+ you can browse the source repository for a certain commit with the failure
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and open the source file, select the relevant lines (click on the line
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number for the first relevant line, then while holding shift click on the
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line number for the last relevant line), click on the ``...`` that appears
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and select "Copy permalink"
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+ should look something like
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``https://github.com/YosysHQ/yosys/blob/<commit_hash>/path/to/file#L139-L147``
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+ clicking on "Preview" should reveal a code block containing the lines of
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source specified, with a link to the source file at the given commit
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Additional details
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~~~~~~~~~~~~~~~~~~
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- once you have created the issue, any additional details can be added as a
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comment on that issue
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- could include any additional context as to what you were doing when you first
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encountered the bug
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- was this issue discovered through the use of a fuzzer
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- if you've minimized the script, consider including the `bugpoint` script you
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used, or the original script, e.g.
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.. code-block:: markdown
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Minimized with
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```
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read_verilog design.v
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# original sequence of commands prior to error
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bugpoint -script <failure.ys> -grep "<string>"
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write_rtlil min.il
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```
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OR
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Minimized from
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`yosys -p ': original sequence of commands to produce error;' design.v`
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- if you're able to, it may also help to share the original un-minimized design
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+ if the design is too big for a comment, consider turning it into a `Gist`_
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.. _Gist: https://gist.github.com/
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