diff --git a/tests/techmap/aigmap.ys b/tests/techmap/aigmap.ys
new file mode 100644
index 000000000..a40aa39f1
--- /dev/null
+++ b/tests/techmap/aigmap.ys
@@ -0,0 +1,10 @@
+read_verilog <<EOT
+module top(input i, j, s, output o, p);
+assign o = s ? j : i;
+assign p = ~i;
+endmodule
+EOT
+
+select t:$mux
+aigmap -select
+select -assert-any %