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remove sorts from some optimisation passes

This commit is contained in:
Lofty 2024-06-25 23:18:57 +01:00
parent 5579685673
commit 8ae1c02d4d
4 changed files with 4 additions and 5 deletions

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@ -39,6 +39,8 @@ proc
equiv_opt -assert -map +/anlogic/cells_sim.v synth_anlogic # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux16 # Constrain all select calls below inside the top module
select -assert-count 5 t:AL_MAP_LUT6
select -assert-count 3 t:AL_MAP_LUT3
select -assert-count 8 t:AL_MAP_LUT4
select -assert-count 1 t:AL_MAP_LUT5
select -assert-none t:AL_MAP_LUT6 %% t:* %D
select -assert-none t:AL_MAP_LUT3 t:AL_MAP_LUT4 t:AL_MAP_LUT5 %% t:* %D