mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-29 11:55:52 +00:00
Code Activity

Move (most of) ExOth and ExAdv slides

Browse source
This commit is contained in:
Krystine Sherwin 2023-08-07 12:58:40 +12:00
parent 7ab051778e
commit 8ade2182b0
No known key found for this signature in database
49 changed files with 828 additions and 1027 deletions
Download patch file Download diff file Expand all files Collapse all files

17
docs/resources/PRESENTATION_ExOth/equiv.ys Normal file
View file

@ -0,0 +1,17 @@
# read test design
read_verilog ../PRESENTATION_ExSyn/techmap_01.v
hierarchy -top test
# create two version of the design: test_orig and test_mapped
copy test test_orig
rename test test_mapped
# apply the techmap only to test_mapped
techmap -map ../PRESENTATION_ExSyn/techmap_01_map.v test_mapped
# create a miter circuit to test equivalence
miter -equiv -make_assert -make_outputs test_orig test_mapped miter
flatten miter
# run equivalence check
sat -verify -prove-asserts -show-inputs -show-outputs miter