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Removed $bu0 cell type

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Clifford Wolf 2014-09-04 02:07:52 +02:00
parent b9cb483f3e
commit 8927aa6148
18 changed files with 27 additions and 103 deletions
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6
manual/CHAPTER_CellLib.tex
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@ -97,12 +97,6 @@ The width of the output port \B{Y}.
Table~\ref{tab:CellLib_binary} lists all cells for binary RTL operators.
The additional cell type {\tt \$bu0} is similar to {\tt \$pos}, but always
extends unsigned arguments with zeros. ({\tt \$pos} extends unsigned arguments
with {\tt x}-bits if the most significant bit is {\tt x}.) This is used
internally to correctly implement the {\tt ==} and {\tt !=} operators for
constant arguments.
\subsection{Multiplexers}
Multiplexers are generated by the Verilog HDL frontend for {\tt