From 8886fa5506b227229398e5ac884203e799bce22c Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddieh@ece.ubc.ca>
Date: Fri, 8 Feb 2019 13:17:53 -0800
Subject: [PATCH] addDff -> addDffGate as per @daveshah1

---
 frontends/aiger/aigerparse.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc
index 154581179..c45de8531 100644
--- a/frontends/aiger/aigerparse.cc
+++ b/frontends/aiger/aigerparse.cc
@@ -176,7 +176,7 @@ void AigerReader::parse_aiger_ascii()
         RTLIL::Wire *q_wire = createWireIfNotExists(module, l1);
         RTLIL::Wire *d_wire = createWireIfNotExists(module, l2);
 
-        module->addDff(NEW_ID, clk_wire, d_wire, q_wire);
+        module->addDffGate(NEW_ID, clk_wire, d_wire, q_wire);
 
         // Reset logic is optional in AIGER 1.9
         if (f.peek() == ' ') {