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https://github.com/YosysHQ/yosys
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parent
bf0a3b1e72
commit
88865ef7ab
1 changed files with 2 additions and 2 deletions
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@ -1272,7 +1272,7 @@ bool VerificImporter::import_netlist_instance_cells(Instance *inst, RTLIL::IdStr
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for (unsigned i = 0 ; i < selector->GetNumBranches() ; ++i) {
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SigSig action(sig_out_val, sig_data_values.extract(offset_data, data_width));
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RTLIL::SyncAction action{sig_out_val, sig_data_values.extract(offset_data, data_width), Twine::Null};
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offset_data += data_width;
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for (unsigned j = 0 ; j < selector->GetNumConditions(i) ; ++j) {
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@ -1311,7 +1311,7 @@ bool VerificImporter::import_netlist_instance_cells(Instance *inst, RTLIL::IdStr
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}
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RTLIL::CaseRule *cs_default = new RTLIL::CaseRule;
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cs_default->module = module;
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cs_default->actions.push_back(SigSig(sig_out_val, sig_data_default));
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cs_default->actions.push_back({sig_out_val, sig_data_default, Twine::Null});
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sw->cases.push_back(cs_default);
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return true;
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