mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-07-22 20:32:07 +00:00
Code Activity

Added warning for use of 'z' constants in HDL

Browse source
This commit is contained in:
Clifford Wolf 2014-11-14 19:59:50 +01:00
parent 4e5350b409
commit 87333f3ae2
3 changed files with 14 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

2
frontends/verilog/verilog_frontend.h
View file

@ -43,7 +43,7 @@ namespace VERILOG_FRONTEND
extern struct AST::AstNode *current_ast;
// this function converts a Verilog constant to an AST_CONSTANT node
AST::AstNode *const2ast(std::string code, char case_type = 0);
AST::AstNode *const2ast(std::string code, char case_type = 0, bool warn_z = false);
// state of `default_nettype
extern bool default_nettype_wire;