From 856fc43a87131f24f4b2ddf71e0cc449ef25f788 Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Wed, 4 Jun 2025 11:18:38 +0200
Subject: [PATCH] rename: format vector slices consistently with HDL
 upto/downto direction

---
 passes/cmds/rename.cc | 2 --
 1 file changed, 2 deletions(-)

diff --git a/passes/cmds/rename.cc b/passes/cmds/rename.cc
index 4b5b41f23..7e3f87147 100644
--- a/passes/cmds/rename.cc
+++ b/passes/cmds/rename.cc
@@ -95,8 +95,6 @@ static IdString derive_name_from_cell_output_wire(const RTLIL::Cell *cell, strin
 		if (chunk.wire->width != chunk.width) {
 			int lhs = chunk.wire->to_hdl_index(chunk.offset + chunk.width - 1);
 			int rhs = chunk.wire->to_hdl_index(chunk.offset);
-			if (chunk.wire->upto)
-				std::swap(lhs, rhs);
 
 			if (lhs != rhs)
 				name += stringf("[%d:%d]", lhs, rhs);