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Renamed AbstractCellEdgesDatabase::add_cell() to add_edges_from_cell()

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This commit is contained in:
Clifford Wolf 2016-07-25 16:39:25 +02:00
parent 5b944ef11b
commit 8537c4d206
3 changed files with 3 additions and 3 deletions
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2
kernel/celledges.cc
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@ -158,7 +158,7 @@ void mux_op(AbstractCellEdgesDatabase *db, RTLIL::Cell *cell)
PRIVATE_NAMESPACE_END
bool YOSYS_NAMESPACE_PREFIX AbstractCellEdgesDatabase::add_cell(RTLIL::Cell *cell)
bool YOSYS_NAMESPACE_PREFIX AbstractCellEdgesDatabase::add_edges_from_cell(RTLIL::Cell *cell)
{
if (cell->type.in("$not", "$pos")) {
bitwise_unary_op(this, cell);

2
kernel/celledges.h
View file

@ -29,7 +29,7 @@ struct AbstractCellEdgesDatabase
{
virtual ~AbstractCellEdgesDatabase() { }
virtual void add_edge(RTLIL::Cell *cell, RTLIL::IdString from_port, int from_bit, RTLIL::IdString to_port, int to_bit, int delay) = 0;
bool add_cell(RTLIL::Cell *cell);
bool add_edges_from_cell(RTLIL::Cell *cell);
};
struct FwdCellEdgesDatabase : AbstractCellEdgesDatabase

2
passes/tests/test_cell.cc
View file

@ -344,7 +344,7 @@ static void run_edges_test(RTLIL::Design *design, bool verbose)
SatGen satgen(&ez, &sigmap);
FwdCellEdgesDatabase edges_db(sigmap);
if (!edges_db.add_cell(cell))
if (!edges_db.add_edges_from_cell(cell))
log_error("Creating edge database failed for this cell!\n");
dict<SigBit, pool<SigBit>> satgen_db;