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Clifford Wolf 2015-08-14 10:56:05 +02:00
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manual/CHAPTER_Approach.tex
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@ -59,7 +59,7 @@ script.
\section{Internal Formats in Yosys}
Yosys uses two different internal formats. The first is used to store an abstract syntax tree (AST) of a verilog
Yosys uses two different internal formats. The first is used to store an abstract syntax tree (AST) of a Verilog
input file. This format is simply called {\it AST} and is generated by the Verilog Frontend. This data structure
is consumed by a subsystem called {\it AST Frontend}\footnote{In Yosys the term {\it pass} is only used to
refer to commands that operate on the RTLIL data structure.}. This AST Frontend then generates a design in Yosys'
@ -107,7 +107,7 @@ from the input file {\tt design.v} to a gate-level netlist {\tt synth.v} using t
described by the Liberty file \citeweblink{LibertyFormat} {\tt cells.lib}:
\begin{lstlisting}[language=sh,numbers=left,frame=single]
# read input file tpo internal representation
# read input file to internal representation
read_verilog design.v
# convert high-level behavioral parts ("processes") to d-type flip-flops and muxes